2013-08-01 07:01 AM
dear all,
I trust you are well. I cannot figure this out and I was hoping someone more experienced than me could help me out...I am trying to allocate memory for 2 buffers (of uint16_t type) on a STM32F407ZG. each buffer should be max 256KB but I can only allocate 1/10 of that (i.e. 25600x16). I am sure I am missing something but do not know what. Any idea?Thank you #memory #stm32f407zg2013-08-01 07:56 AM
Allocating with what, and from where?
2013-08-01 08:46 AM
hey clive. using calloc(256000, sizeof(uint16_t)). from anywhere I could. I cannot use an external SRAM as I need the FSMC as I have an LCD.
cheers2013-08-01 08:54 AM
Well you'd need to provide >512KB of heap to do that, configuration would depend on the chain, and the allocator implementation. The bigger issue is where that memory would come from, as you don't have that much RAM.
Not sure a fixed buffer from FLASH is what you have in mind. Some of thehttp://www.solomon-systech.com/en/product/mobile-system/standard-display-controller/ssd1962/
controllers have 1.2MB of on-board frame buffer for that purpose.2013-08-01 09:23 AM
that's what I was thinking but I can't figure out how to configure the heap memory in GCC. but you're saying that I don't have that much RAM so there is no point in increasing the heap.
The LCD I am using has indeed a Solomon controller (SSD1963) but I didn't need the memory for that but to store 2.5sec of audio. If the FSMC is configured for the LCD I cannot use the 512Kx16 SRAM module I have, right?2013-08-01 09:47 AM
The FSMC has multiple chip selects to permit multiple devices/banks at 0x60000000, 0x64000000, etc.
Have you reviewed a schematic for the STM3240G-EVAL board?2013-08-01 10:02 AM
yes, but my understanding was that using the SRAM the Bank1 would have been busy with the memory. So it is possible to use (let's say) PSRAM1 for the LCD and PSRAM2 for the memory, as the pins configuration should be compatible.
2013-08-01 01:14 PM
I don't know what you mean by busy, the FSMC is an external bus interface, it's utilization will depend on the activity sent it's way. Each bus access will take some arbitrary number of cycles, depending on how it's configured.
I'm looking at a design right now that has SRAM BANK1 REGION3 0x68000000 NOR BANK1 REGION2 0x64000000 LCD BANK1 REGION4 0x6C000000 NAND BANK3 0x800000002013-08-01 02:49 PM
sorry for the stupid question. my bad. I thought all regions of BANK1 would have been used for the SRAM. I had the LCD using REGION4 of BANK1 and now I have added the SRAM module, enabled on REGION3 and it's working!
thank you ever so much clive!