2023-11-30 04:12 PM
Hello,
The STM32U585 Reference Manual say these chips have one AES and one SAES peripheral. In turn each of these have an "AES core algorithm (AEA)" component. I expect that to mean that there are two physically independent AEA's on the chip. Is that correct?
Thanks
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2023-11-30 05:52 PM
With the exception of the shared key interface from SAES -> AES, they are independent.
2023-11-30 05:52 PM
With the exception of the shared key interface from SAES -> AES, they are independent.