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ADC1 triggers once then no more

picguy
Associate II
Posted on August 03, 2008 at 02:04

ADC1 triggers once then no more

1 REPLY 1
picguy
Associate II
Posted on May 17, 2011 at 12:41

I am not seeing what is going on here. ADC1 has been told by Timer 2 CC2 to start converting. And it does. Once. Yet Timer2 CC2 is working because I set an interrupt on it. Debugger breakpoints in my dummy Timer 2 handler with only CC2 enabled to interrupt. I have to clear the breakpoint to get much of anything else done.

If my code snippets fail to display as code then they will be most difficult to follow.

;** turn on various ports

;

; +-----------------ADC3 = 0

; |+----------------USART1 = 0 (for now)

; ||+---------------TIMER 8 =0

; |||+--------------SPI1 = 0 (for now...)

; ||||+-------------TIMER 1 = 0

; |||||+------------ADC2 = 0

; ||||||+-----------ADC1 = 1

; |||||||+----------PORT G = 0

; ||||||||+---------PORT F = 0

; |||||||||+--------PORT E = 0

; ||||||||||+-------PORT D = 1

; |||||||||||+------PORT C = 1

; ||||||||||||+-----PORT B = 1

; |||||||||||||+----PORT A = 1

; ||||||||||||||x+--AFIO = 0

movs r0,0000001000111100b

ldr r4,=baseRCC

str r0,[r4,RCC_APB2ENR]

;** setup GPIO port A for analog input on PA4/5 (is ADC12_4/5)

ldr r0,=basePORTA

; 76543210 (for GPIO_CRL)

ldr r1,=0x44004444

str r1,[r0,GPIO_CRL]

;** setup ADC1 to convert 2 channels on tmr2-CC2 **

ldr r0,=baseADC1

ldr r1,=0x2920 ;enable EOC int & set scan mode & convert 2 chans

mov r1,0x120 ;okay, try this

str r1,[r0,ADC_CR1]

ldr r1,=0x00160801 ;sets tmr2_CC2, left align & enable

str r1,[r0,ADC_CR2]

movs r1,0x09 ;samps 0&1 1.5 (+5) -> 14 clocks...

str r1,[r0,ADC_SMPR2] ;... of 9 MHz = less than 2 uSec / channel

movs r1,0x00100000 ;only 2 samples

str r1,[r0,ADC_SQR1]

movs r1,(4<<0)+(5<

str r1,[r0,ADC_SQR3]

;-------------------------------------------------------------------------------

; ADC ISR

;

; Entered after both ADC conversions are done

;

ADC12

ldr r0,=baseADC1

movs r1,0

str r1,[r0,ADC_SR] ;kill ADC start flag & others we dont care about

ldr r1,[r0,ADC_DR] ;data (I know I need DMA to read both samples)

bx lr

Perhaps someone will see my problem from what I believe to be the relevant code.

I also need directions about how to post bits of code.