ADC Sampling Does not look correct NUCLEO-G474RE
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2024-04-16 2:13 PM
My system clock is 170 MHz, and my ADC1 clock is asynchronous with a prescaler of 4. This would mean my ADC1 frequency is 42.5 MHz. I have the ADC being triggered by a timer that is fed off the system clock and triggers every 1 millisecond.
ADC config
The resolution I have set is 12 bits which takes 12.5 clock cycles and the sampling time I selected is 247.5 clock cycles, which would mean a total of 260 clock cycles. If the ADC clock is running at 42.5 MHz, then it should take 6.11 μs to sample. I set a GPIO pin to go high when the 1 ms timer triggers, and then to go low in the HAL_ADC_ConvCpltCallback function. So I am expecting it to go high for 6.11 μs and then go low until the clock triggers again.
Instead, what I am seeing is the pin staying high for 6 ms, not μs. Did I configure something wrong?
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STM32G4 Series
