ADC Resolution
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‎2014-08-08 08:29 AM
ADC resolution 12 bits(with 16 bit buffer) works but 8 bit(with 8bit buffer) results in the code going into an infinite loop in the DMA ISR.
__IO uint8_t buffer[1000];/* ADC Config*/ ADC_StructInit(&ADC_InitStructure); ADC_InitStructure.ADC_Resolution = ADC_Resolution_8b; ADC_InitStructure.ADC_ScanConvMode = DISABLE; ADC_InitStructure.ADC_ContinuousConvMode = DISABLE; ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_Rising; ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T3_TRGO; ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; ADC_InitStructure.ADC_NbrOfConversion = 1; ADC_Init(ADC1, &ADC_InitStructure); ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 1, ADC_SampleTime_192Cycles); #adc #stm32l151- Labels:
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ADC
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STM32L1 Series
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‎2014-08-08 08:46 AM
ADC resolution 12 bits(with 16 bit buffer) works but 8 bit(with 8bit buffer) results in the code going into an infinite loop in the DMA ISR.
Code that you conveniently fail to provide...Up vote any posts that you find helpful, it shows what's working..
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‎2014-08-08 08:55 AM
I have included the code that is relevant to the problem. I don't think its a problem in the DMA_ISR. Its something in the way the ADC/Buffer works or sampling rate. ADC Is being sampled at 10KHz
void DMA1_Channel1_IRQHandler(void){ if(flag) { /*do something/* } else { /*do something else*/ } /*Clear DMA Channel Transfer Complete interrupt pending bit */ DMA_ClearITPendingBit(DMA1_IT_TC1);}- Mark as New
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‎2014-08-08 10:07 AM
Check the Data Alignment section in the reference manual. Byte alignment happens only for 6 bit conversions.
Hal- Mark as New
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‎2014-08-08 11:08 AM
Hello Hal!
Thanks for your response. Yes, I checked the ref manual and as you said only 6b and 12b can be aligned. But by default ADC_StructInit(&ADC_InitStructure); aligns by right. Also the problem does not happen when I use a 16 bit buffer. I am trying to store microphone data so would I need to do some processing to make it in PCM format or is the ADC data captured read for playback?Thanks!kj- Mark as New
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‎2014-08-08 11:27 AM
I have included the code that is relevant to the problem.
If you knew what code was problematic you wouldn't be here asking. Present a sufficiently complete example that can be evaluated. Most likely you aren't configuring the DMA properly, but how can I judge that? Where you clear the interrupt you'll currently tickle a Cortex-M3 hazard, you really should qualify the IT flag and clear it early.Up vote any posts that you find helpful, it shows what's working..
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