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ADC reads wrong values

rene2399
Associate II
Posted on July 27, 2009 at 07:06

ADC reads wrong values

13 REPLIES 13
aled
Associate II
Posted on May 17, 2011 at 13:18

A small update:

On our channel 10 we had a 100K pull down resistor on the input. On channel 11 there was no pulldown R but a 100nF to ground. We realised that there would be a capacitor switching during the ADc sample in the ADC and the 100nF cap would compensate for this.

Cosmapa - I suggest that you try a 100nF cap to ground on each ADC input, hopefully this should solve your problem.

andreas2
Associate II
Posted on May 17, 2011 at 13:18

cosmapa:

You're right. I took the errata reference out of memory and it wasn't the same issue.

Then it's most likely (as aleh hinted) insufficient sampling time for your source resistance. Or rather, since your sampling time is maxed, simply too high source resistance.

The solution is buffering high speed signals, and for low speed signals choose the capacitor in the RC-filter (which is a good thing to have anyway) large enough to overcome the effect of the sample-and-hold capacitor. It's about 5 pF so 10 nF would be well enough for most applications.

[ This message was edited by: andreas1 on 22-07-2009 16:16 ]

stevemelnikoff9
Associate II
Posted on May 17, 2011 at 13:18

We saw something similar with an op-amp connected to the ADC input.

The problem was due to the bandwidth of the op-amp being insufficient to deliver the current necessary to charge the ADC's 12 pF capacitor in the short time allowed.

Adding an RC filter (1 K and 100 uF; this was a slow-moving signal) solved the problem.

raptorhal
Associate II
Posted on May 17, 2011 at 13:18

aleh is on the right track. Here is my explanation why, as well as a recommended solution:

The ADC has an input capacitance of 10 pF. This forms an RC network with the signal input impedance. If you use a 30K resistor, channel switching noise doesn't have time to dissipate before conversion. The 100 nF capacitor overcomes the problem by quickly charging the ADC sample and hold input capacitance. The direct wire to ground effectively does the same.

While the direct wire to ground can be a test case, it is obviously not a design solution. The 100 nF capacitor forms an RC network with the signal impedance, which can limit the maximum signal frequency. The preferred solution is a low impedance signal source such as an operational amplifier connected to both the ADC input and a capacitor to ground. Check the amplifier's specifications to ensure it will cover the frequency you need and follow the recommendations on maximum capacitance it will drive.

Added note: This subject is well covered in AN2834 How To Get The Best ADC Accuracy, sections 2.2.5 and 2.2.6. Figure 19 summarizes it nicely. Anreas1 choice of 10 nF is a good recommendation.

Cheers, Hal

[ This message was edited by: raptorhal on 23-07-2009 15:30 ]