ADC problem

shai2 · ‎2009-10-12

Posted on October 12, 2009 at 14:36

ADC problem

shai2 · ‎2011-05-17

Posted on May 17, 2011 at 13:25

Hi, All.

I work with STM32F103 and IAR embedded workbench IDE.

I initialized the ADC as discontinuous mode regular group with two channels (channel 1 and 3) and DISCNUM[2:0] bits in the ADC_CR1 = 1.

The ADC freq = 12MHz, The conversion triggered by an external trigger from Ext_IT11 (= 600KHz).

I inject the same signal to channel 1 and 3 (I checked it with scope), but the result of the channel that initialized as the 2nd conversion in regular sequence is 20% lower from the channel that initialized as the 1st conversion in regular sequence.

I tried to switch between the channels (ADC_SQR3 register) but the result are the same the 2nd conversion is lowest from the 1st.

Why itâ€™s happen? Did anyone have an idea?

ADC Initialization:

ADC_InitTypeDef ADC_InitStructure;

ADC_DeInit(ADC1);

/* ADC1 configuration ------------------------------------------------------*/

ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;

ADC_InitStructure.ADC_ScanConvMode = DISABLE;

ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;

ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_Ext_IT11;

ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;

ADC_InitStructure.ADC_NbrOfChannel = 2;

ADC_Init(ADC1, &ADC_InitStructure);

ADC_RegularChannelConfig(ADC1, ADC_Channel_3, 1, ADC_SampleTime_1Cycles5);

ADC_RegularChannelConfig(ADC1, ADC_Channel_1, 2, ADC_SampleTime_1Cycles5);

ADC_DiscModeChannelCountConfig(ADC1, 1);

ADC_DiscModeCmd(ADC1, ENABLE);

ADC_DMACmd(ADC1, ENABLE);

ADC_ExternalTrigConvCmd(ADC1, ENABLE);

ADC_Cmd(ADC1, ENABLE);

ADC_ResetCalibration(ADC1);

while(ADC_GetResetCalibrationStatus(ADC1));

ADC_StartCalibration(ADC1);

while(ADC_GetCalibrationStatus(ADC1));

Thanks in advance.

tomas23 · ‎2011-05-17

Posted on May 17, 2011 at 13:25

Don't you have any synchronous crosstalk, external or internal? I've already seen such thing while SPI and even JTAG were talking at such speed and the ADC measurement was disturbed by this.

Btw. due to speed, I am interested in one thing - can you check with scope, if your signal doesn't oscillate somehow? Or, whether the source impedance doesn't cause the voltage swing due to load caused by sampling cap?

jj · ‎2011-05-17

Posted on May 17, 2011 at 13:25

Generally agree w/edison - not this time...

Doubt that ''crosstalk'' would ''consistently'' reduce a signal by 20%.

Like the fact that you ''reversed'' channels - and re-tested.

Ask that you eliminate the speed issue by performing both conversions TEN TIMES slower - see if that helps. If yes - should be simple matter to learn @ what speed system ''flys off the rails.''

Do agree with edison about importance of stable (and low) source impedance. Suggest that you replace your current source with a ''beefier'' known stable one - and repeat tests...

shai2 · ‎2011-05-17

Posted on May 17, 2011 at 13:25

Thanks for your quick replay.

After a series tests, the problem isnâ€™t a crosstalk and the signal are ok I check with scope.

I inject the same DC signals to the ADC channel_3 and channel_1 (channel_3 is the 1st and channel_1 is the 2nd) the result are (you can see them in the attached .xls file): for DC ~1.5V the result are the same, for DC < 1.5V channel_3 is lower then channel_1 and for DC > 1.5V channel_3 is high then channel_1.

When I switched between the channel only in the ADC_SQR3 (channel_1 is the 1st and channel_3 is the 2nd) the result was: for DC ~1.5V the result are the same, for DC < 1.5V channel_1 is lower then channel_3 and for DC > 1.5V channel_1 is high then channel_3.

It seems like the channel that 2nd conversion isnâ€™t calibrated.

Did anyone have an idea?

Thanks.

[ This message was edited by: SK on 12-10-2009 10:51 ]

[ This message was edited by: SK on 12-10-2009 11:01 ]

jj · ‎2011-05-17

Posted on May 17, 2011 at 13:25

Before we go much further:

a) have you repeated this test on 2 entirely different ADC channel inputs? Results?

b) have you repeated this test on a different pcb - or at least on a different STM32? (to eliminate any target chip ''weirdness'')

c) also suggest that you ensure your source signal is adequate, stable and then apply it to ONLY ONE ADC input at a time. Chart this result - then switch to your 2nd channel (again only 1 input) and repeat.

For serious analog work we've employed a 10 pole bpf (band pass filter) in front of the analog input - to prevent (off channel) noise from spoiling our readings.

My bet remains with edison that you are ''loading down'' your source...

cosmapa · ‎2011-05-17

Posted on May 17, 2011 at 13:25

watch at your signal impedance going into the adc vs the sample/hold time.

It may be that the second conversion occurs when the signal has stabilized further.

I've had a few issues with the ADC and its internal capactor getting properly charged/discharged prior to conversion.