Can we latch encoder timer synchronized current measurement? (STM32H5)

[yang2]

Dear All,
I am developing a motor control system(FOC) with STM32H5.
In the FOC process, while completing the ADC conversion for current measurement, it enters the ADC interrupt, where I read the TIM2 counter(for Encoder interface) to obtain rotor angle information.

What I’m considering is that since the motor is rotating, reading the TIM2 value after ADC converts(current measurement)  may not ensure that they are synchronized (althought the time difference is minimal).

Does STM32H5 have any features that can trigger TIM2 to latch the counter simultaneously when sampling the current?

Best Regards,

[waclawek.jan · Accepted solution]

If the ADC is triggered from a timer, you can use TRGO from that timer as TRGI into TIM2 (by selecting it in as appropriate ITRx in TIM2_SMCR.TS) and then use that to trigger Capture on TIM2_CH3 or TIM2_CH4 by setting TIM2_CCMR2.CCxS to 0b11 to capture upon trigger (TRC - that's ouput signal of the trigger selector mux).

JW

[Roger SHIVELY]

Hello @yang2 

This post has been escalated to the ST Online Support Team for additional assistance. 

We'll contact you directly.

Regards,

Roger

[yang2]

Hello Waclawek,

Thanks your opinion, It's good advise to me.

I have another ideal, maybe we can use TRGO to trig DMA, and transfer the data from TIM2.CNT to my variables.

The advantage is that there's no need to go through capture.(CH3/CH4)

It seems like it will be simpler.

However, I'm not sure if TRGO can be directly used to trigger the DMA conversion.

Anyway, Thanks a lot for your reply, I appreciate.

Best Regards,

[waclawek.jan]

> not sure if TRGO can be directly used to trigger the DMA conversion.

Not TRGO as such, but the event which is set as TRGO (or any other apropriate event such as Compare on CHx in the timer which triggers the ADC) can be.

DMA has some latency and that has some jitter, that's why capture is more precise. However, that jitter is in the order of few system clock cycles, that may or may be negligible for your application.

JW