Where is the MII ''Transmit Error'' signal on the STM32F4xx?

[adam239955_stm1_stmicro_com]

Posted on June 15, 2012 at 20:55

Hi,

I'm currently doing a design using the STM32F407 which is going to use Ethernet. I am going to be interfacing to an external PHY through the MII interface. My question is in regards to the ''Transmit Error'' from the MII specification. After looking through the documentation for the STM32F407, there does not seem to be any mention of this signal! I was expecting to see something like ''ETH_MII_TX_ERR'' but there is nothing like this anywhere. Is this signal something that I can simply tie low on the PHY side, or is there something I am missing here? Any thanks appreciated! #phy #stm32f4 #ethernet #mii

[Tesla DeLorean]

Posted on June 15, 2012 at 21:46

It's not a signal any of the STM32's have output, some PHY just have this pulled low internally, you'd need to check the part specs.

[adam239955_stm1_stmicro_com]

Posted on June 18, 2012 at 16:09

Hi clive1,

Thanks your your response! If the signal is not available, does that just mean that it not required for proper functioning of the Ethernet? Is the performance, reliability, or compliance to standards going to suffer due to this?

[Tesla DeLorean]

Posted on June 18, 2012 at 17:36

Hard to say, it's output presumably is a response to a collision and to jam the output, with invalid encodings. It's there to purposefully corrupt a packet, and there are other methods of achieving that.

In some systems it's used to send raw encodings of the 4B/5B format by acting as the fifth TX bit. It's generally not used in Reduced MII modes.