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Uart configuration STM32G0

arekj
Associate II

Hi, 

There is possible to set up USART2 on PA2 and PA15? 

In documentation in both pins is possible to use USART2 (PA2 as TX and PA15 as RX).

I try do it, but I don't get interrupt when data is send to RX pin. On Uart1 (PA9, PA10)  it's work correct. 

For UART2 I used this same register configuration as for UART1.

 

//******************************
// Uart 1
//******************************
// clock enable
RCC->APBENR2 |= RCC_APBENR2_USART1EN;
USART1->BRR = (U16) (CLK_HCLK / DEF_HELP_RS_BAUD_RATE);
		
// DE Enable & Timing
USART1->CR3 |= USART_CR3_DEM;
USART1->CR1 |= USART_CR1_DEAT_0 | USART_CR1_DEAT_1 | USART_CR1_DEAT_2 | USART_CR1_DEAT_3 | USART_CR1_DEAT_4; 
USART1->CR1 |= USART_CR1_DEDT_0 | USART_CR1_DEDT_1 | USART_CR1_DEDT_2 | USART_CR1_DEDT_3 | USART_CR1_DEDT_4;
		
// Configuration
// 8-bit length + no parity - nothing needn't be configured
		
// Enable interrupts: RxD
USART1->CR1 |= USART_CR1_RXNEIE_RXFNEIE;
		
// Enable: RxD | UART
USART1->CR1 |= USART_CR1_RE | USART_CR1_UE;
		
//******************************
// Uart 2
//******************************		
// clock enable
RCC->APBENR1 |= RCC_APBENR1_USART2EN;
USART2->BRR = (U16) (CLK_HCLK / DEF_HELP_RS_BAUD_RATE);
		
// DE Enable & Timing
USART2->CR3 |= USART_CR3_DEM;
USART2->CR1 |= USART_CR1_DEAT_0 | USART_CR1_DEAT_1 | USART_CR1_DEAT_2 | USART_CR1_DEAT_3 | USART_CR1_DEAT_4; 
USART2->CR1 |= USART_CR1_DEDT_0 | USART_CR1_DEDT_1 | USART_CR1_DEDT_2 | USART_CR1_DEDT_3 | USART_CR1_DEDT_4;
		
// Configuration
// 8-bit length + no parity - nothing needn't be configured
		
// Enable interrupts: RxD
USART2->CR1 |= USART_CR1_RXNEIE_RXFNEIE;
		
// Enable: RxD | UART
USART2->CR1 |= USART_CR1_RE | USART_CR1_UE;

 

2 REPLIES 2

Read out and check/post UART and relevant GPIO registers content.

 > I don't get interrupt when data is send to RX pin. 

Polled Rx works?

JW

arekj
Associate II

I don't know why, but today when I started again testing communication, interrupts works correct.
So I don't know what was the problem, but for now is solved.

Anyway, Thanks for help 🙂