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Timer Prescaler Application Clarification

STuser2
Senior II

I did not understand the significance of the number 65536 in the below code

pHandle->OvfFreq = (uint16_t)(pHandle->TIMClockFreq / 65536U);
/* Set fixed to 150 ms */
      pHandle->HallTimeout = 150U;
 /* Compute the prescaler to the closet value of the TimeOut (in mS )*/
    pHandle->HALLMaxRatio = (pHandle->HallTimeout * pHandle->OvfFreq) / 1000U ;

    /* Align MaxPeriod to a multiple of Overflow.*/
    pHandle->MaxPeriod = pHandle->HALLMaxRatio * 65536UL;

My main confusion is how the OvfFreq with division of 65536 help the code to reduce the calculations. According to my understanding if TIMClockFreq = 170MHz then the time is T = 1/170Mhz i get overflow after 65535, so if the number of overflows are OverflowCnt then the total time elapsed will be 65535*1/170MHz*OverflowCnt + Input capture timer registers.

 

1 ACCEPTED SOLUTION

Accepted Solutions
MOBEJ
ST Employee

hello @STuser2  ,

please in each STM32G4 project where you encounter this code ?

 for a deeper explanation and detailed understanding of this value, I recommend referring to the STM32G4 Reference Manual.Specifically, you can check the section on Advanced-control timers in the following document:

STM32G4 Series Reference Manual (RM0440)

This section thoroughly explains the timer architecture, including the 16-bit timer counter size (65536 counts), overflow behavior, and related timing calculations.

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To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

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MOBEJ
ST Employee

hello @STuser2  ,

please in each STM32G4 project where you encounter this code ?

 for a deeper explanation and detailed understanding of this value, I recommend referring to the STM32G4 Reference Manual.Specifically, you can check the section on Advanced-control timers in the following document:

STM32G4 Series Reference Manual (RM0440)

This section thoroughly explains the timer architecture, including the 16-bit timer counter size (65536 counts), overflow behavior, and related timing calculations.

br

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.