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STM32H755 dual core debug - demo project

lonejack
Associate III

Hi, after a lot of wasted time, I've created a demo for dual core with debug files:

Here is the project:

https://github.com/lonejack/stm32cubeide-demo-dualcore 

To make the setup the guide:

https://www.youtube.com/watch?v=k3mXhPZSasw 

has been followed.

I made some changes...

Import the project with option:

lonejack_0-1705048171879.png

three projects..

lonejack_1-1705048529091.png

Generate the code and build projects.

Then run the debug with "stm32cubeide-demo-dualcore"

lonejack_2-1705048671633.png

 

Wait the download and main enter for both processors:

lonejack_3-1705048768332.png

 

Run the CM4, it should go in this state:

lonejack_4-1705048841004.png

Run the CM7, it should go in running:

lonejack_5-1705048954157.png

 

Return in CM4, press run button, it should go in running:

lonejack_6-1705049010996.png

 

Now both cores are running...

The given guide to me didn't work!

If someone has better solution please write here...

Thank you.

C.

 

 

 

 

 

8 REPLIES 8
FBL
ST Employee

Hello 

> The given guide to me didn't work!

Could you please explain what is the problem? Are you aiming to multi core debug for example? If not, you can simply comment the boot sequences to run one core in debug.

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lonejack
Associate III

Hi Mr. Belaid,

you're right, my target is to debug both cores contemporary.

In the guide for example it isn't described how to do this. Do I have to load the two debug launcher? Or just one single (cm7)?

Furthermore, it should be specified that, for syncro reasons, is necessary to run the CM4 and after the CM7.

In order to obtain this I made a "Launch Group" that run the two launcher.

All these info aren't present in the guide...

Anyway, if you have a better solution, write here.

C.

FBL
ST Employee

In CM7 debug configuration, you need to:

  1. Select ST Link GDB server
  2. Define Access port 0 for CM7
  3. Connect under reset
  4. Enable shared ST LINK
  5. In startup tab, add CM4 image file .elf and list it before CM7 elf file then save.

In CM4 debug configuration:

  1. Set debug probe ST link GDB server (port number 61238)
  2. Define Access Port to 3 for CM4
  3. Set None in reset behavior.
  4. Enable Shared ST Link
  5. In startup tab, edit the CM4 image and disable download (it will be done by CM7). 

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

About the CM4 configuration you have only to download the symbols not the code.

So, at this point, what we should do?

  • start the CM4 (CM4 at semaphore check goes in stop);
  • start the CM7;
  • restart the CM4 (that is waiting at the semaphore);

Now you can debug...

But these info, where are described in the video?

lonejack
Associate III

Reading my answer, I understand now that there's a mix of items here. I faced problems these during my first test on the NUCLEO board and the draft dual core project (form STM32CubeIDE) insert a semaphore for both cores synchronization.

So in my initial post I wrote "The given guide to me didn't work!". That statement is incorrect (it is not my intention to offend anyone). The guide explain how to make the two launchers but, after this, you need to make a launch group and start correctly the cores.

Exactly, this is an example. Do you still have issues to debug CM4 core?

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

No problems at moment.

Now I've the next step...

Do you know what is the best method to share or exchange data between cores?

Thank you

C.

Hi @lonejack 

Here is an example STM32CubeH7/Projects/STM32H747I-EVAL/Applications/ResourcesManager/ResourcesManager_SharedResources at master · STMicroelectronics/STM32CubeH7 (github.com)

I hope this helps.

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.