STM32H743 ADC_CHANNEL_VBAT measurement offset

[AlexK]

Hi All,

I have constant measurement offset in Vbat internal channel from ADC3, ~30mV above the supplied value.

Vref calculated by macro:

__HAL_ADC_CALC_VREFANALOG_VOLTAGE((uint32_t)(measure->adcDataAverage[measureVref]) , ADC_RESOLUTION_16B);

i see offset of 4 mV above the configured 2.5V (reading is 2.504 - 2.505)

Vbat also calculated by macro:

__HAL_ADC_CALC_DATA_TO_VOLTAGE((uint32_t)(systemObj->dump[MIN_NET_ADDR_NUMBER - 1].measurement[measureObjVref][dbgObjectNameVoltage - dbgObjectNameCurrent]) , measure->adcDataAverage[measureVbat] , ADC_RESOLUTION_16B);

but offset is higher: 30mV above the input voltage.

i check with NUCLEO-H753ZI by run of  STM32Cube\Repository\STM32Cube_FW_H7_V1.11.2\Projects\NUCLEO-H743ZI\Examples\ADC\ADC_InternalChannelConversion

and also observed offset around 20mV.

According to  DS: https://www.st.com/resource/en/datasheet/stm32h743vi.pdf page 109, Vref has max.15 mv "spread", but the Vbat deviation is not specified.

Please advise.

[Saket_Om · Accepted solution]

Hello @AlexK 

ADC conversions of channels to VrefInt and Vbat require minimum sampling time, specified in datasheet.
For STM32H742xx/43xx: tS_vrefint=4.3us min, tS_vbat = 9us min.
Sampling time depends on ADC kernell clock frequency (from RCC and ADC config) and ADC channel sampling time config.
Could you check your configuration ?

ADC channel to Vbat accuracy:
Vbat is measured through a resistor ladder, tolerance is specified in datasheet : table "VBAT monitoring characteristics"
For STM32H742xx/43xx: +-10%