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STM32F107 Ethernet DMASR->TBUS not working as expected?

JFenl
Associate

I am in the process of porting the LwIP 1.4.1 evaluation project in AN3966 from the STM32F407 eval board to our own STM32F107 board. Everything went smooth on the receive side (receiving ARP, etc. packets just fine) but nothing was being transmitted. Traced the issue down to the following code in the ETH_Prepare_Transmit_Descriptors() function:

 /* When Tx Buffer unavailable flag is set: clear it and resume transmission */

 if ((ETH->DMASR & ETH_DMASR_TBUS) != (u32)RESET)

 {

  /* Clear TBUS ETHERNET DMA flag */

  ETH->DMASR = ETH_DMASR_TBUS;

  /* Resume DMA transmission*/

  ETH->DMATPDR = 0;

 }

This makes sense according to the STM32F107 datasheet. However, whenever the code gets to this spot the ETH->DMASR always reads 0x00660000 which I read to mean that the Transmit Process State (TPS) = 110, or suspended, but the Transmit Buffer Unavailable Status (TBUS) is cleared.

When I change the 'if' statement to:

 if ((ETH->DMASR & ETH_DMASR_TPS_Suspended) != (u32)RESET)

the transmits work great.

Assuming there isn't an error in the datasheet, any ideas as to what would cause the DMASR->TBUS status bit to not work as expected? Is there a difference in the DMA setup of the STM32F107 that I'm missing?

Thanks,

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