STM32 U5A9 SPI DMAPause and DMAResume are empty

[G_Anastasopoulos]

Dear All,

I am working on the STM32U5A9 platform. I am migrating to this MCU a project that was developed on the STM32F7, that was using the HAL_SPI_DMAPause and HAL_SPI_DMAResume functions.

Looking into the HAL of the U5 I see this:

Why are these functions deprecated? What would be the best course of action in order to achieve the same functionality as before on the U5?

Thank you in advance.

[Imen.D]

Hello @G_Anastasopoulos ,

HAL_SPI_DMAPause() and HAL_SPI_DMAResume() are not supported here as mentioned that are maintained for backward compatibility reasons.

In this SPI version -for example- we can abort the transfert if we are using the DMA, this is because the RXDMAEN & TXDMAEN are write protected when SPI is enabled, which means once the SPI instance is enabled the state of those two bits cannot be modified.

[G_Anastasopoulos]

Dear @Imen.D 

In order to get my code working I saw what these functions looked like in the F7 HAL and I took them and adjusted them to look like this:

static HAL_StatusTypeDef SPI_DMA_Pause(SPI_HandleTypeDef* hspi) {
	if (hspi->Instance == SPI1){
    __HAL_LOCK(hspi);

    /* Disable the SPI DMA Tx & Rx requests */
    CLEAR_BIT(hspi->Instance->CFG1, SPI_CFG1_TXDMAEN);

    /* Unlock the process */
    __HAL_UNLOCK(hspi);
	}
    return HAL_OK;
}

static HAL_StatusTypeDef SPI_DMA_Resume(SPI_HandleTypeDef* hspi) {
	if (hspi->Instance == SPI1){
    /* Process Locked */
    __HAL_LOCK(hspi);

    /* Enable the SPI DMA Tx & Rx requests */
    SET_BIT(hspi->Instance->CFG1, SPI_CFG1_TXDMAEN);

    /* Process Unlocked */
    __HAL_UNLOCK(hspi);
	}
    return HAL_OK;
}

With debugging I can see that the value of the CFG1 register changes when I either clear or set the bit.

How is this possible?