FDCAN RAM allocation on STM32G4 series

Qin1 · ‎2026-02-06

May I ask how the FDCAN Message RAM offset allocation, Tx and Rx BufferElementSize can be configured on G4 Series. As in cubeMX it doesnt give me the option to like the H7 series. Or is that done automatically by the core when generating the code?

If so, could I know if it is possible to change it?

mƎALLEm · ‎2026-02-06

Hello,

STM32H7 has the full set of FDCAN features while on STM32G4, FDCAN has been simplified and the allocation is fixed by hardware.

For example, FDCAN_SIDFC and FDCAN_XIDFC registers are not available in STM32G4 to set the filters start address.

So there is no RAM offset allocation in STM32G4 for FDCAN. No issue with HAL nor in CubeMx.

From the STM32G4 reference manual:

Which is not the case of STM32H7.

Hope it does answer your question.

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mƎALLEm · ‎2026-02-06

Hello,

STM32H7 has the full set of FDCAN features while on STM32G4, FDCAN has been simplified and the allocation is fixed by hardware.

For example, FDCAN_SIDFC and FDCAN_XIDFC registers are not available in STM32G4 to set the filters start address.

So there is no RAM offset allocation in STM32G4 for FDCAN. No issue with HAL nor in CubeMx.

From the STM32G4 reference manual:

Which is not the case of STM32H7.

Hope it does answer your question.

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.

Qin1 · ‎2026-02-06

@mƎALLEm May I know what document did you quote this from?

mƎALLEm · ‎2026-02-06

@mƎALLEm wrote:

From the STM32G4 reference manual:

I said from the reference manual: RM0440

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.