2024-10-22 09:53 PM - last edited on 2024-10-23 12:57 AM by Andrew Neil
The update function using the DUALBANK SWAP function added to the firmware for the old CPU (STM32L4R5QII6) has been ported to the firmware for the new CPU (STM32L4P5CGU).
The firmware rewrite process is as follows:
1. Transfer the binary file .bin via UART and X-MODEM communication
2. Rewrite from the start address (0x08080000) of the non-booted BANK in the FLASH area
3. Change the register "FLASH_OPBT" to BFB2=1 to enable the BANKSWAP function
4. Soft reset
5. Start from BANK2 (the rewritten firmware).
All steps 1 to 5 worked without problems with the STM32L4R5QII6 firmware
But when ported to the STM32L4P5CGU firmware, steps 1 to 4 worked without problems
but a HardFault occurred during the initialization process at startup of step 5, causing a reset.
Analysis with a debugger revealed that the cause was an invalid address reference when executing the function "LL_SPI_TransmitData16()".
When porting this function to the STM32L4P5, it seems necessary to write code to specify the memory address reference destination in the source code "system_stm32l4xx.c".
Is this correct? If so, I would appreciate it if you could tell me the code to add.
Thank you in advance.