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SPI in STM32F427 in slave mode

DR77
Associate II

Hi, gents,

     I have some need to use SPI slave mode instead of working SPI master mode.
     I'm tranferring 22 16-bit words from Infineon slave board at 6Mhz clock rate, once per 100 ns, and have 4-line interface including CS line. Due to noisy lines I prefer to reset communication before each 22x16 bit transfer.
     The picture is attached - the 4th line represents CS signal, the 2nd line - data sent from STM32, line 3 is zero as zeros are sent.
     After some attempts to write the code I came to solution, when I'm attaching a low-priority EXTI interrupt to SPI5 NSS pin (PF6 GPIO pin), and this interrupt has the following code (this code worked OK for master mode):

if (GPIO_Pin == GPIO_PIN_6)
{
    if (hspi5.State != HAL_SPI_STATE_READY)
    {     HAL_SPI_DMAStop(&hspi5);   }
     HAL_StatusTypeDef td = HAL_SPI_TransmitReceive_DMA(&hspi5,(uint8_t*)spi2CAT, (uint8_t*)CAT2spi, CAT_PACK_SIZE*(sizeof(int32_t)/2));
      tdd = td;
      SPI_cnt++;
}

The code works as in picture, except one point: it inserts 1 extra 16-bit word during transmission.
If I remove HAL_SPI_DMAStop() - synchorization may be lost and data are corrupted.
Maybe I need to insert some wait cycle, but I'm inside an interrupt, which can be interrupted by higher priority interrupt. Placing  HAL_SPI_TransmitReceive_DMA() into receive completion callback also looses sync.

Question: for this code, may something is not cleared in SPI transmit/receive buffer? Maybe I've overlooked simpler method?


 

 

 

2 REPLIES 2
mƎALLEm
ST Employee

Hello,

You can inspire from the example provided in the F4 cube package here.

mALLEm_0-1752844460091.png

 

To give better visibility on the answered topics, please click on "Accept as Solution" on the reply which solved your issue or answered your question.

I'm sorry, but this sample is completely useless.
My main problem is syncronized packet transfer, which requires more complex solution.
Maybe you have another version(s)?