Is there a known limitation with STM32H7 SDMMC when writing to higher LBA regions?

[HANITALY]

Hi Mike,

Thanks again for your previous support on the SPI interface.
I have since moved to using the SDMMC interface instead of SPI for better performance, but I am still facing issues.

Current Issue Summary:
I can successfully mount the 32GB SDHC FAT32 card and read the capacity using FatFs.

However, f_write always fails.

After debugging, I found that BSP_SD_WriteBlocks fails when writing to LBA 32768.

I also verified this with direct HAL_SD_WriteBlocks, which fails at LBA 32768 but works on lower LBAs like 0 or 1.

This suggests the problem is not in FatFs logic, but rather in high LBA (large address) block access stability.

My Questions:
Is this a known limitation with STM32H7 SDMMC or HAL drivers when writing to higher LBA regions on large-capacity SD cards (like 32GB)?

1. What is the commonly tested and verified capacity for STM32H7 SDMMC + FatFs reference designs?
2. Do most STM32 applications use 4GB / 8GB / 16GB cards, or is 32GB commonly used and verified?
3. Any additional debugging steps you would recommend on the SDMMC interface, like tuning ClockDiv, bus width, or DMA settings?

Looking forward to your insights.

Best regards,

Han

Edit: Moved from STM32H753ZI SPI SD Card Not Responding to CMD0/CMD8 (0xFF Response)

[Saket_Om · Accepted solution]

Hello @HANITALY 

Did you try to communicate with the SD card only with HAL SDMMC before using FatFs? 

[HANITALY]

@Saket_Om 

Hi, I actually have solved the issue, forgot to deleted this post. 

Thank you for the reply！

[Amel NASRI]

Hi @HANITALY ,

Glad to know that the faced issue is already fixed.

It would be interesting if you can share the solution with our community.

-Amel

[HANITALY]

Hi,

It has been a while, I only recall that I set SDMMC_BUS_WIDE from 4B to 1B, and connected physically only the D0 pin to the board, then it worked. 

static void MX_SDMMC1_SD_Init(void)

{

/* USER CODE BEGIN SDMMC1_Init 0 */

/* USER CODE END SDMMC1_Init 0 */

/* USER CODE BEGIN SDMMC1_Init 1 */

/* USER CODE END SDMMC1_Init 1 */

hsd1.Instance = SDMMC1;

hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;

hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;

hsd1.Init.BusWide = SDMMC_BUS_WIDE_1B;

hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;

hsd1.Init.ClockDiv = 32;

/* USER CODE BEGIN SDMMC1_Init 2 */

/* USER CODE END SDMMC1_Init 2 */

}

This is the configuration that worked.