Is is possible to configure, which pins are used by STM-Bootloader?

[Syn_BE]

I want to use the bootloader feature (via UART) of the STM32L071RB. I have read the AN2606 and AN3155.

If I'm right, the STM32L071RB has a V11.x bootloader and can be updated via UARTx, SPIx,and I2Cx.

Is is possible to configure, which pins are used by STM-Bootloader?

I only want UART1 pins (PA9, PA10) to be "active" during bootloader.

Is there something like a "fuse-byte" which chooses the "active" interfaces?

Or do I really have to take care that all bootloader-pins (especially the outputs of SPI1 SPI2, UART2-Tx) do not collide with peripherals connected to these pins?

Best regards

[Tesla DeLorean]

No unfortunately not, ST didn't think this all through, especially as the number of supported interfaces expanded.

Chirping UART sources are the worst problem, the newer model device do allow you to cross wire the RX/TX pins so it doesn't see an input signal to key off.​

[Peter BENSCH]

The bootloader is a fixed embedded function and can be called or initiated with BOOT0 and the option bytes, but no additional configuration is possible/required.

The bootloader checks the serial connections specified in AN2606 for an incoming connection and ignores those for which there is no suitable communication. In this regard, peripherals not used by the bootloader can be connected as you like.

When your question is answered, please close this topic by choosing Select as Best.

/Peter

[Syn_BE]

Thanks for answering so fast.

@Peter BENSCH​ 

I worry about pins like SPIx MISO and UART2-Tx.

Example:

Let's assume a design, where in standard application firmware SPIx MISO pins and UART2-tx pins are configured as GPIO INPUTS.

Let's assume further, that during BOOTLOADER, a LOW-level will be driven from external peripheral on both SPI NSS pins. And the SPIx MISO pins and UART2-Tx are connected to outputs of some other ICs.

If the output-levels (high/low) of these bootloader-pins are different than the ones of "the other ICs",

there might be some kind of short circuit, right?

Therefore the designer has to pay attention to a lot of pins, so that they are not in conflict with the surrounding peripherals during Bootloader, right?

[Peter BENSCH · Accepted solution]

Correct. The designer should know which peripheral will be used for the bootloader.

AN2606 also mentions in section 4.3: "It is recommended to keep the RX pins of unused bootloader interfaces (USART_RX, SPI_MOSI, CAN_RX and USB D+/D- lines if present) at a known (low or high) level at the startup of the bootloader (detection phase). Leaving these pins floating during the detection phase might lead to activating unused interfaces."