Intermittent TCP communication with KSZ8863 broken?

[CiuppaPT]

On a couple of internally developed boards based on an architecture combining an STM32F407 and a KSZ8863RLL, I have experienced failures on the latter chip that I cannot explain. The issue manifests as intermittent communication with the TCP client that pings the board. Occasionally, it seems that some packets are lost, causing the communication to drop out and then resume, only to fail again after a short while. I suspect that the environment in which the board is used might be subject to ESD events or overvoltage conditions caused by imbalances in the differential voltage on the bus. Since we are in an industrial context, it is standard practice to connect the digital grounds of the boards and power supplies to earth. The suspicion that the problem is due to internal damage of the chip is supported by the fact that, on these faulty boards, replacing the KSZ8863 restores normal operation without any interruptions.

[LCE]

> might be subject to ESD events or overvoltage conditions caused by imbalances in the differential voltage on the bus

What kind of CAT cables are used ?

Correctly wired (isolated) ethernet connections on both sides should not allow / prevent "imbalances"

How are the ethernet connector (probably RJ45) and its shield connected ?

Have you kept it isolated, but used some x nF / y kV caps between shield and local GNDs ?

Any other path to create ground loops, maybe via some sensor / whatever IOs ?

PS: we're using the KSZ8863, but it's still in the development phase - meaning it's at least handled by ESD-sloppy design engineers... :D

[CiuppaPT]

R1) CAT cables used : 5E / 6 

R2) Not used some x nF / y kV caps between shield and local GNDs ? 

Do you mean something like this... 

No, we don't get it.

R3) Any other path to create ground loops, maybe via some sensor / whatever IOs ?  No!

[LCE]

2) Okay, that could be a problem, then it might help to put such a cap (or more than 1) between RJ45 shield and case / earth / some low impedance path.

Energy needs to go somewhere, and without the caps the easiest way could be via the ethernet connector and transformer into your system / PCB / PHY / MCU.

[CiuppaPT]

Thank you for your advice. So, in your opinion, could the anomaly in my faulty chips have been caused by an event related to currents induced by ground loops? What do you think about adding a resistor of at least 1M in parallel to the capacitor to align the potential in case of electrostatic charge accumulation on the connector?

[LCE · Accepted solution]

Yes, it could be the cause.

1M in parallel - absolutely! Make it big enough (1206) for pad distance / creepage.
I usually use the same footprint for C & R, so I can test where each is doing its best.

And I place a few at different locations. If they are not needed in production, they won't be mounted.

PS: all this is just guessing, I don't know the rest of the system, the PCB layout, the industrial environment, the stoopid users, ...