How to manage don't care bit in DMA SPI communication?

[Gzini.6]

I need to read a data stream from two ADS1298 ADC connected in daisy chain configuration.

According to the attached datasheet, at page 17 Fig 2, you can see that in daisy chain mode the data of the second ADC are sent after a don't care bit.

To receive i use the DMA transfer in this way:

Wait the data ready interrupt from the ADC, so active the CS pins and start the DMA

void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin){
	//ADC1 data ready
	if(GPIO_Pin==DRDY_Pin){
		   CS0_ON;
	           CS1_ON;
	           Start_IT_DMA_ADC(&hspi1, Ads1298_Buf, 54);
	}
 }

void Start_IT_DMA_ADC(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size)
{
	static uint8_t Temp = 0;
 
    hspi->pTxBuffPtr  = (uint8_t*)&Temp;
    hspi->TxXferSize  = Size;
    hspi->TxXferCount = Size;
 
    hspi->pRxBuffPtr  = (uint8_t*)pData;
    hspi->RxXferSize  = Size;
    hspi->RxXferCount = Size;
 
    /*Init field not used in handle to zero */
    hspi->RxISR = 0;
    hspi->TxISR = 0;
 
	/* Set the SPI RxDMA transfer complete callback */
	hspi->hdmarx->XferCpltCallback = DMA_Rx_CpltSPI;
 
	/* Set the SPI RxDMA transfer complete callback */
	hspi->hdmatx->XferCpltCallback = NULL;
 
	/* Enable the Rx DMA Channel */
	HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
 
    /* Enable Rx DMA Request */
    SET_BIT(hspi->Instance->CR2, SPI_CR2_RXDMAEN);
 
    /* Enable the Tx DMA Channel */
    HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
 
    /* Enable Tx DMA Request */
    SET_BIT(hspi->Instance->CR2, SPI_CR2_TXDMAEN);
}

And the Rx Cplt callback

void DMA_Rx_CpltSPI(DMA_HandleTypeDef *hdma){
 
    CS0_OFF;
    CS1_OFF;
 
    ...
}

what i get in the Ads1298_Buf, as expected, is this:

First 27 byte of the first ADC 8 diff channels (StatusWord 3 byte+ 3*8 byte)

the first 3 byte are the status word in bold (pag53 of the datasheet), the underlined others are the data

1# ADC

192 000 000 174 089 216 174 110 166 174 120 208 174 105 104 174 086 041 174 156 073 174 235 160 173 185 242 

2# ADC

096 000 000 088 002 160 087 191 034 087 171 099 087 154 069 127 254 197 127 253 231 127 253 108 127 251 162

Converted in binary:

11000000 00000000 00000000 10101110 00111101 10100100 10101110 01010010 10010011 10101110 01011010 10110101 10101110 01000010 11010111 10101101 10101010 00000001 10101101 11010001 00100101 10101101 11111001 00010010 10101101 01100111 01111000 

As you can see here there's a >>1 shift due to the don't care bit (strikethrough one) and probably a missing last bit

01100000 00000000 00000000 01010111 10000000 10010000 11010111 01100000 10000110 01010111 01011111 00011001 01010111 01010001 00100011 01111111 11111100 01101100 11111111 11111011 11110100 01111111 11111010 11010110 01111111 11111010 01011001 ?0000000 < missing bit?

So one solution could be to receive 55 byte instead of 54 and then shift everything of 1 bit left somehow.

But i would like to find a way to overcome this directly in the reception mechanism.

STM32F405

SPI

  hspi1.Instance = SPI1;
  hspi1.Init.Mode = SPI_MODE_MASTER;
  hspi1.Init.Direction = SPI_DIRECTION_2LINES;
  hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
  hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
  hspi1.Init.CLKPhase = SPI_PHASE_2EDGE;
  hspi1.Init.NSS = SPI_NSS_SOFT;
  hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;
  hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
  hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
  hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
  hspi1.Init.CRCPolynomial = 10;