How to enable I3C on Nucleo-H563ZI in Zephyr RTOS?

[Alvin0916]

Hi Technical Support Team,
I am working with the Nucleo-H563ZI board and would like to enable the I3C interface within the Zephyr environment.
Could you provide a minimal sample project or a reference configuration (Devicetree/Kconfig) to validate the I3C host driver and I3C shell?
Thank you for your assistance.
----------------------------------------------
prj.conf
CONFIG_I3C=y
CONFIG_I3C_SHELL=y
CONFIG_I3C_STM32=y
CONFIG_USERSPACE=y
CONFIG_I3C_RTIO=y
----------------------------------------------

[Saket_Om]

Hello @Alvin0916 

Please refer to the following video: 

Using I3C bus for connecting I3C and I2C sensors - Zephyr Meetup Prague

[Alvin0916]

Hi Saket_Om,

Could you let me know which Zephyr version this demo is implemented with?
compiler environment # Zephyr version :4.3.99
Is the arduino_i3c: &i3c1 {}; line necessary for the I3C driver to work?

Would it be possible for you to review the nucleo_h563zi.overlay？
#video's Timestamp at 10:53

------------------------nucleo_h563zi.overlay-------------------------

&i3c1 {
pinctrl-0 = <&i3c1_scl_pd12 &i3c1_sda_pd13>;
pinctrl-names = "default";
status = "okay";

clocks = <&rcc STM32_CLOCK(APB1, 23U)>,
         <&rcc STM32_SRC_HSI I3C1_SEL(2)>;
i2c-scl-hz = <400000>;
i3c-scl-hz = <6000000>;
}
-------------------------------------------ref info-----------------------------

/* /home/alvin/zephyrproject/zephyr/boards/st/nucleo_h563zi/nucleo_h563zi-common.dtsi */
&i3c1 {
	pinctrl-0 = <&i3c1_scl_pd12 &i3c1_sda_pd13>;
	pinctrl-names = "default";
	i3c-scl-hz = <12500000>;
	status = "okay";
};

&rcc {
	clocks = <&pll>;
	clock-frequency = <DT_FREQ_M(240)>;
	ahb-prescaler = <1>;
	apb1-prescaler = <2>;
	apb2-prescaler = <1>;
	apb3-prescaler = <2>;
};

/* /home/alvin/zephyrproject/zephyr/dts/arm/st/h5/stm32h5.dtsi */
i3c1: i3c@40005c00 {
compatible = "st,stm32-i3c";
reg = <0x40005c00 0x400>;
interrupts = <123 0>, <124 0>;
interrupt-names = "event", "error";
#address-cells = <3>;
#size-cells = <0>;
clocks = <&rcc STM32_CLOCK(APB1, 23)>;
resets = <&rctl STM32_RESET(APB1L, 23)>;
zephyr,pm-device-runtime-auto;
status = "disabled";
};

rcc: rcc@44020c00 {
			compatible = "st,stm32h5-rcc";
			clocks-controller;
			#clock-cells = <2>;
			reg = <0x44020c00 0x400>;

			rctl: reset-controller {
				compatible = "st,stm32-rcc-rctl";
				#reset-cells = <1>;
			};
		};