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Help with Ethernet configuration

Palacios.Bruno
Associate III

‎2013-07-18 11:18 AM

Posted on July 18, 2013 at 20:18

Hello guys, I need some help. Im trying to interface a stm32f407 with a lan8720 via RMII interface using an external clock source from the PHY.

I was able to measure the 50MHz sine wave generated by the PHY, but I can't see any comunication between chips. I mean, MDC is always low and MDIO is always high (because there's a pull up resistor). Below is the code. I'm pretty sure that there's a problem related with the external reference clock. It seems like the MAC it's not running. I think there's something wrong configured. The code is based on [DEAD LINK /public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/MDC%20MDIO%20stay%20low%20forever%20after%20configuring%20RMII%20%20Ethernet%20on%20STM32F4&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&currentviews=520]this post. Best regards! 

void ETH_GPIO_Config(void)
{
uint16_t i = 0;
// Data structure to represent GPIO configuration information
GPIO_InitTypeDef GPIO_InitStructure;
// Enable the peripheral clocks
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB |
RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD,
ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); // Early
// Configure PD8 (RMII_nRST)
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
GPIO_Init(GPIOD, &GPIO_InitStructure);
// Hold the Ethernet PHY in reset
GPIOD->BSRRH = 0x100;
// Set RMII mode while in reset
SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_RMII);
//GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
// Configure PA1, PA2 and PA7 (RMII_REFCLK, RMII_MDIO, RMII_CRS_DV
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_7;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_ETH);
// Configure PB11 (RMII_TXEN), PB12 (RMII_TXD0), PB13 (RMII_TXD1)
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource11, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource12, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_ETH);
// Configure PC1, PC4 and PC5 (RMII_MDC, RMII_RXD0, RMII_RXD1)
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource1, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource4, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource5, GPIO_AF_ETH);
for(i = 0; i < 
20000
; i++); // PHY Out of reset
GPIOD->BSRRL = 0x100;
}

IO_InitTypeDef GPIO_InitStructure;
// Enable the peripheral clocks
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB |
RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD,
ENABLE);
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); // Early
// Configure PD8 (RMII_nRST)
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
GPIO_Init(GPIOD, &GPIO_InitStructure);
// Hold the Ethernet PHY in reset
GPIOD->BSRRH = 0x100;
// Set RMII mode while in reset
SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_RMII);
//GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
// Configure PA1, PA2 and PA7 (RMII_REFCLK, RMII_MDIO, RMII_CRS_DV
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_7;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_ETH);
// Configure PB11 (RMII_TXEN), PB12 (RMII_TXD0), PB13 (RMII_TXD1)
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource11, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource12, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_ETH);
// Configure PC1, PC4 and PC5 (RMII_MDC, RMII_RXD0, RMII_RXD1)
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource1, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource4, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource5, GPIO_AF_ETH);
for(i = 0; i < 
20000
; i++); // PHY Out of reset
GPIOD->BSRRL = 0x100;

#stm32 #discovery #ethernet-phy
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6 REPLIES 6
Tesla DeLorean
Guru

‎2013-07-18 12:06 PM

Posted on July 18, 2013 at 21:06

The link doesn't work for me.

The code doesn't look wrong.

You are aware the PHY is at a different address than the DP83848, right?
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Palacios.Bruno
Associate III

‎2013-07-18 12:26 PM

Posted on July 18, 2013 at 21:26

Hi Clive1,

Thank you for your answer. 

I read it somewhere, but should I worry about that now? Or I'm missing something? Because, for me, the main problem is I can't establish the comunication between mac and phy =/. But as Im a newbie with ethernet and st maybe there's something I'm missing.

Did you use the 50MHz source clock from lan8720? Or from the MCO pin?

Best regards!

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Tesla DeLorean
Guru

‎2013-07-18 01:45 PM

Posted on July 18, 2013 at 22:45

The design I looked at generated 25 MHz out the MCO pin from the HSE. The SMSC8720A was strapped to use a 25 MHz source. You could perhaps use MCO to generate 50 MHz if the PLL ran the CPU at a multiple of 50 MHz (ie 150 MHz).

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Palacios.Bruno
Associate III

‎2013-07-18 02:09 PM

Posted on July 18, 2013 at 23:09

Yes, I can use the MCO, but I will have to redesign my board and I want to avoid it. 

I've realize that the 25MHz signal generated by the crystal it's mounted on a 3KHz ''almost sine'' wave O.O

And the 50MHz output sine is mounted on a 6KHz sine. That is wear and I don't why it happends. 

I am totaly confused.

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Tesla DeLorean
Guru

‎2013-07-18 05:02 PM

Posted on July 19, 2013 at 02:02

What do you have right now as a clock source (part#), and what pins is that attached too?

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Palacios.Bruno
Associate III

‎2013-07-18 05:18 PM

Posted on July 19, 2013 at 02:18

Well, I was, finally, able to get it work. The code is the same used in

http://www.backwoodsengineer.com/2013/02/geeky-post-stm32f4-bb-ethernet-projects.html

. The low frec sine mounted on the crystal was present in the stm32f4 8MHz crystal too. And I measure in another board and same situation, so it could be my osc or I don't know, lol. Thank you for all clive1, I really appreciate your help. Best regards, 

void ETH_GPIO_Config(void)
{
volatile uint32_t i;
GPIO_InitTypeDef GPIO_InitStructure;
/* Enable GPIOs clocks */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB
| RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOD, ENABLE);
/* Enable SYSCFG clock */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
/* MII/RMII Media interface selection --------------------------------------*/
SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_RMII);
/* Ethernet pins configuration ************************************************/
/*
ETH_MDIO --------------> PA2
ETH_MDC ---------------> PC1
ETH_RMII_REF_CLK-------> PA1
ETH_RMII_CRS_DV -------> PA7
ETH_MII_RX_ER -------> PB10
ETH_RMII_RXD0 -------> PC4
ETH_RMII_RXD1 -------> PC5
ETH_RMII_TX_EN -------> PB11
ETH_RMII_TXD0 -------> PB12
ETH_RMII_TXD1 -------> PB13
ETH_RST_PIN -------> PE2
*/
/* Configure PA1,PA2 and PA7 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_7;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
GPIO_Init(GPIOA, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_ETH);
/* Configure PB10,PB11,PB12 and PB13 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
GPIO_Init(GPIOB, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource11, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource12, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_ETH);
/* Configure PC1, PC4 and PC5 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5;
GPIO_Init(GPIOC, &GPIO_InitStructure);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource1, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource4, GPIO_AF_ETH);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource5, GPIO_AF_ETH);
/* Configure the PHY RST pin */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_Init(GPIOD, &GPIO_InitStructure);
GPIO_ResetBits(GPIOD, GPIO_Pin_8);
for (i = 0; i < 20000; i++);
GPIO_SetBits(GPIOD, GPIO_Pin_8);
for (i = 0; i < 20000; i++);
}

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