2022-04-28 10:04 PM
I have read many samples in cube h7 github repository, and I have seen any hal autoplling example consulting status registers in 4 lines mode operation. It is supported? I am using STM32H750 with cube h7 1.10.0.
2022-04-29 02:10 AM
What make/model memory device are you using?
Seem to recall you using Bank 2
Show initialization code, paste as quoted text, not graphic. See </> icon.
PB2 CLK
PC11 BK2 NCS
PE7 BK2 D0
PE8
PE9
PE10 BK2 D3
2022-04-29 09:29 AM
/* QUADSPI init function */
void MX_QUADSPI_Init(void)
{
/* USER CODE BEGIN QUADSPI_Init 0 */
/* USER CODE END QUADSPI_Init 0 */
/* USER CODE BEGIN QUADSPI_Init 1 */
/* USER CODE END QUADSPI_Init 1 */
hqspi.Instance = QUADSPI;
hqspi.Init.ClockPrescaler = 9;
hqspi.Init.FifoThreshold = 1;
hqspi.Init.SampleShifting = QSPI_SAMPLE_SHIFTING_NONE;
hqspi.Init.FlashSize = 21;
hqspi.Init.ChipSelectHighTime = QSPI_CS_HIGH_TIME_1_CYCLE;
hqspi.Init.ClockMode = QSPI_CLOCK_MODE_3;
hqspi.Init.FlashID = QSPI_FLASH_ID_2;
hqspi.Init.DualFlash = QSPI_DUALFLASH_DISABLE;
if (HAL_QSPI_Init(&hqspi) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN QUADSPI_Init 2 */
/* USER CODE END QUADSPI_Init 2 */
}
void HAL_QSPI_MspInit(QSPI_HandleTypeDef* qspiHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
if(qspiHandle->Instance==QUADSPI)
{
/* USER CODE BEGIN QUADSPI_MspInit 0 */
/* USER CODE END QUADSPI_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_QSPI;
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
{
Error_Handler();
}
/* QUADSPI clock enable */
__HAL_RCC_QSPI_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
__HAL_RCC_GPIOE_CLK_ENABLE();
__HAL_RCC_GPIOC_CLK_ENABLE();
/**QUADSPI GPIO Configuration
PB2 ------> QUADSPI_CLK
PE7 ------> QUADSPI_BK2_IO0
PE8 ------> QUADSPI_BK2_IO1
PE9 ------> QUADSPI_BK2_IO2
PE10 ------> QUADSPI_BK2_IO3
PC11 ------> QUADSPI_BK2_NCS
*/
GPIO_InitStruct.Pin = GPIO_PIN_2;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_11;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/* USER CODE BEGIN QUADSPI_MspInit 1 */
/* USER CODE END QUADSPI_MspInit 1 */
}
}
void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef* qspiHandle)
{
if(qspiHandle->Instance==QUADSPI)
{
/* USER CODE BEGIN QUADSPI_MspDeInit 0 */
/* USER CODE END QUADSPI_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_QSPI_CLK_DISABLE();
/**QUADSPI GPIO Configuration
PB2 ------> QUADSPI_CLK
PE7 ------> QUADSPI_BK2_IO0
PE8 ------> QUADSPI_BK2_IO1
PE9 ------> QUADSPI_BK2_IO2
PE10 ------> QUADSPI_BK2_IO3
PC11 ------> QUADSPI_BK2_NCS
*/
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_2);
HAL_GPIO_DeInit(GPIOE, GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10);
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_11);
/* USER CODE BEGIN QUADSPI_MspDeInit 1 */
/* USER CODE END QUADSPI_MspDeInit 1 */
}
}
My code works for read or write operation (polling only wel bit). But for erase operation I need to poll wel and wip/busy bit. I am using W25Q32JVSSIM-TR.
2022-04-29 11:48 AM
Other L4 examples break the register read into a more normal interaction/loop
The auto-poll should work, not sure if there is any errata. You have the Y or V step of the H750 ? Doubt you have Z or X's
https://www.st.com/resource/en/errata_sheet/es0396-stm32h750xb-and-stm32h753xi-device-limitations-stmicroelectronics.pdf Nothing jumping out..
Does it really need you looking at both bits? BUSY is the thing you need to spin on
Try the Mode 0 clock mode. ie where it doesn't idle high
05h should work in 1-bit and 4-bit, mode? Make sure spimode is right, that QE is set, and Quad Mode is enabled (38h), won't be by default. It will exit QPI if FFh is clocked as a command
QE is in SR2, and SR1/SR2 need to be written as a pair
2022-04-29 11:53 AM
Cross linking other thread to help find them later https://community.st.com/s/question/0D53W00001WJBQOSA5/qspi-strange-behavior-when-autopolling