HAL: Porting from L4 to U5: flash and flush (caches)

[FKaes.1]

Hello, I'm porting code from L4 to U5. The original code was able to change flash during runtime (erase and program). The L4 Hal lib deactivated caches before flash operation and flushes them afterwards. This isn't done by the U5 Hal lib. I don't need explanation. It is ok for me, if you can confirm, that there is not risk, when cache is enabled during the programming U5.

[Saket_Om · Accepted solution]

Hello @FKaes.1 

The deactivation and flash of the cache in the STM32G4 when performing flash operation is due to the implementation of the workaround for the errata 2.2.13.

This is not the case for STM32U5. 

[FKaes.1]

Hello, Thanks. I assume the G4 workaround relates also to the L4. Additional, I'm using a U5 with 1MB (=> 1 Bank). Then this issue should not happen anyway.