Hello,
I am trying to use FMC on an STM32U5G9J-DK2 to communicate with an LCD (ST7789). I am trying to send initialization commands to the device as follows
define FMC_BANK1_REG ((volatile uint16_t *)0x60000000)
#define FMC_BANK1_DATA ((volatile uint16_t *)0x60000002)
void write_command(uint8_t data)
{
volatile uint16_t *p = FMC_BANK1_REG;
*p = (uint16_t)(data);
}
void write_data(uint16_t data)
{
volatile uint16_t *p = FMC_BANK1_DATA;
*p = data;
}
// Ex:
write_command(0xFF)
However, when I write 0xFF to memory at address 0x60000000, I don't just see the value written to the single memory address. Instead, it appears to be writing to many subsequent memory addresses. What I see is FF00FF00 written to all addresses between 0x60000000 and 0x600001CC. I understand that the memory is little endian, so FF00 is expected. However, I am unsure why it is repeating to other addresses. I am using the default, CubeMX generated code for FMC initialization, shown below.
/* FMC initialization function */
static void MX_FMC_Init(void)
{
/* USER CODE BEGIN FMC_Init 0 */
/* USER CODE END FMC_Init 0 */
FMC_NORSRAM_TimingTypeDef Timing = {0};
/* USER CODE BEGIN FMC_Init 1 */
/* USER CODE END FMC_Init 1 */
/** Perform the SRAM1 memory initialization sequence
*/
hsram1.Instance = FMC_NORSRAM_DEVICE;
hsram1.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
/* hsram1.Init */
hsram1.Init.NSBank = FMC_NORSRAM_BANK1;
hsram1.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
hsram1.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
hsram1.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16;
hsram1.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
hsram1.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
hsram1.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
hsram1.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
hsram1.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
hsram1.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
hsram1.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
hsram1.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
hsram1.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
hsram1.Init.WriteFifo = FMC_WRITE_FIFO_ENABLE;
hsram1.Init.NBLSetupTime = 0;
hsram1.Init.PageSize = FMC_PAGE_SIZE_NONE;
hsram1.Init.MaxChipSelectPulse = DISABLE;
/* Timing */
Timing.AddressSetupTime = 3;
Timing.AddressHoldTime = 15;
Timing.DataSetupTime = 2;
Timing.DataHoldTime = 2;
Timing.BusTurnAroundDuration = 2;
Timing.CLKDivision = 16;
Timing.DataLatency = 17;
Timing.AccessMode = FMC_ACCESS_MODE_A;
/* ExtTiming */
if (HAL_SRAM_Init(&hsram1, &Timing, NULL) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN FMC_Init 2 */
/* USER CODE END FMC_Init 2 */
}
If anyone could provide help on this matter, it would be greatly appreciated.
