2025-02-19 7:43 AM
Question about the above PWR_LPSLEEP example code.
My test setup includes this:
* STM32CubeIDE Version: 1.17.0, Build: 23558_20241125_2245 (UTC).
* HAL library STM32Cube_FW_G0_V1.6.2.
* NUCLEO-G0B1RE.
The example code in main() reduces the clock frequency (lines 123-124):
/* Reduce the System clock to below 2 MHz */
SystemClock_Decrease();
What is the advantage of the reduced clock frequency, as the Cortex-M0+ CPU clock is already off in LP Sleep Mode? The Reference Manual RM0444 states on page 128that this has "no effect on other clocks or analog clock sources". Does the reduced system clock frequency save power by reducing the clock for all other clocks or analog clock sources?
Thank you for your response.
Solved! Go to Solution.
2025-02-24 12:12 AM
Hello Kmax18,
While "Table 26. Low-power mode summary" indicates that the CPU clock is turned off and there is no effect on other clocks or analog clock sources, reducing the system clock frequency before entering low-power modes can still be beneficial:
I hope this explanation meets your needs.
2025-02-24 12:12 AM
Hello Kmax18,
While "Table 26. Low-power mode summary" indicates that the CPU clock is turned off and there is no effect on other clocks or analog clock sources, reducing the system clock frequency before entering low-power modes can still be beneficial:
I hope this explanation meets your needs.