Ethernet 'Descriptor Skip Length' counts bytes or 32bit words?

DFuchs · ‎2020-03-25

Hi,

i'm looking in the reference manual RM0433 rev7 for the STM32H743 on page 2910.

Bits 20:18 DSL[2:0]: Descriptor Skip Length
This bit specifies the 32-bit word number to skip between two unchained descriptors. The address skipping starts from the end of the current descriptor to the start of the next descriptor.
When the DSL value is equal to zero, the DMA takes the descriptor table as contiguous.

Does it mean a 4 corresponds to 4x8Bit(32Bit) or to 4x32Bit?

Kind regards

Daniel

alister · ‎2020-03-27

I read the RM. The DSL starts at bit 18. So the ETH_DMACCR_DSL_64BIT is a DSL of 2 which means its units is 32-bits.

The ETH_DMACCR register description is correct,

View solution in original post

waclawek.jan · ‎2020-03-26

When it says "32-bit word number", why would then that value mean number of bytes?

Do you have a different experience?

Why do you want to use this feature anyway?

JW

alister · ‎2020-03-26

From stm32h743xx.h

#define ETH_DMACCR_DSL_Pos                            (18U)
#define ETH_DMACCR_DSL_Msk                            (0x7UL << ETH_DMACCR_DSL_Pos) /*!< 0x001C0000 */
#define ETH_DMACCR_DSL                                ETH_DMACCR_DSL_Msk       /* Descriptor Skip Length */
#define ETH_DMACCR_DSL_0BIT                           ((uint32_t)0x00000000)
#define ETH_DMACCR_DSL_32BIT                          ((uint32_t)0x00040000)
#define ETH_DMACCR_DSL_64BIT                          ((uint32_t)0x00080000)
#define ETH_DMACCR_DSL_128BIT                         ((uint32_t)0x00100000)

The STM32H7 HAL ETH driver uses the DSL so they can stick pointers, BackupAddr0 and BackupAddr1, in each descriptor to remember the buffers they've attached the DMA.

In https://community.st.com/s/question/0D50X0000C6eNNSSQ2/bug-fixes-stm32h7-ethernet I'd flagged they shouldn't be declared volatile as that only wastes cycles.

I thought I'd flagged too they should be moved to other cached memory. But must have forgotten. It'd be less cycles and small change if they'd put them in an array in ETH_RxDescListTypeDef.

waclawek.jan · ‎2020-03-26

> The STM32H7 HAL ETH driver uses the DSL so they can stick pointers, BackupAddr0 and BackupAddr1, in each descriptor to remember the buffers they've attached the DMA.

Okay, thanks, that explains that question of mine.

You then certainly answer also the original question, i.e. whether DSL is in bytes or words.

JW

DFuchs · ‎2020-03-27

At the moment i hope that the define is correct and the manual is a little ambiguous.

When the define is incorrect everyone using HAL and ethernet should have big problems.

p.s.: I think about a magic word after each descriptor for testing purpose and i cannot use the HAL because of safety related consideration.

alister · ‎2020-03-27

> whether DSL is in bytes or words.

Not going to reading the RM now as it's past my bed-time.

In the HAL ETH driver the ST code-cutter added 2x 32-bit pointers to the rx & tx descriptors and wrote ETH_DMACCR_DSL_64BIT to DMACCR.

From the macros listed in the earlier post and my recollection the descriptors in memory, expect the DSL defaults 0, and indicates the number of additional "bytes" added to the "natural" descriptor size.

alister · ‎2020-03-27

I don't expect HAL users would normally change the DSL bits because they'd have to change the HAL ETH driver or write their own (non-HAL) Eth driver if they did.

alister · ‎2020-03-27

I read the RM. The DSL starts at bit 18. So the ETH_DMACCR_DSL_64BIT is a DSL of 2 which means its units is 32-bits.

The ETH_DMACCR register description is correct,

DFuchs · ‎2020-03-27

Thank you!

Of course,

ETH_DMACCR_DSL_64BIT = ((uint32_t)0x00080000)

0x00080000 >> 18 = 2.

2x 32Bit = 64Bit

Reference manual and HAL are correct!

I must be blinded.