1 ACCEPTED SOLUTION
Accepted Solutions
Hello @MAmem.1 ,
DMA requests are generated by Data Register becoming empty in transmission and Data Register becoming full in reception.
The CPU can be seen as if it’s suppressed, and to unleash its full working power this data transfer task has to be handed over to another unit and here it comes the DMA unit to offload these exhausting data transactions from the CPU.
As you can see in the diagram above, the existence of the DMA unit can now direct the data stream coming from the I2C peripheral directly to the memory while the CPU doing other stuff and calculations. This parallel cooperation between the CPU and the DMA is where the acceleration stems from.
Hope my answer helped you!
When your question is answered, please close this topic by choosing Select as Best.
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Foued.
Hello @MAmem.1 ,
DMA requests are generated by Data Register becoming empty in transmission and Data Register becoming full in reception.
The CPU can be seen as if it’s suppressed, and to unleash its full working power this data transfer task has to be handed over to another unit and here it comes the DMA unit to offload these exhausting data transactions from the CPU.
As you can see in the diagram above, the existence of the DMA unit can now direct the data stream coming from the I2C peripheral directly to the memory while the CPU doing other stuff and calculations. This parallel cooperation between the CPU and the DMA is where the acceleration stems from.
Hope my answer helped you!
When your question is answered, please close this topic by choosing Select as Best.
This will help other users find that answer faster.
Foued.
