Code Isolation on STM32G484VET for safety-critical (non-upgradable area) and non-safety-critical (Upgradable area)

[HirenThumar2702]

Hello Support Team.

Good Day.

We have chosen the STM32G484VET controller for our product.

According to the firmware architecture, we intend to create two separate partitions, one for safety-critical (non-upgradable area) and the other for non-safety-critical (Upgradable area)

When we will go to certification that time we will only certify the safety-critical code.

So can you provide me guidance for code separation for safety and non-safety code?

If you have any examples of the same STM32G4 series, please share them with us.

Thank you, 

Hiren R. Thumar.

[Peter BENSCH]

The G484 is based on the Cortex-M4, which makes such a separation impossible, at least if it is not to be vulnerable.

This can be perfectly realised with Cortex-M33-based STM32, e.g. STM32L5, STM32U5 or the brand new STM32H5.

Hope that helps?

Regards

/Peter

[HirenThumar2702]

Hi Peter,

Good day.

Thank you for your guidance

I've attached an image of a block diagram. we will be considered modules for safety-critical and non-safety-critical as per the block diagram

We will provide CRC of safety-critical flash areas when we will go to certification. If I change the non-safety-critical code, this safety-critical flash area CRC must not change.

So, according to your suggestion, does the STM32L5 Series support this type of isolation? If you have any examples or documents, please share them with us.

Thanks

Hiren R. Thumar

[Peter BENSCH · Accepted solution]

Yes, that is exactly what the Cortex-M33 was designed for.

You will find:

• an overview incl. a short introduction video and detailed information in
• AN5347 Arm® TrustZone® features for STM32L5 and STM32U5 Series
• AN5421 Getting started with STM32L5 Series microcontrollers and TrustZone® development

Good luck in doing the first steps!

Regards

/Peter

[HirenThumar2702]

Hi Peter,

Good day.

Thank you for guiding me over code isolation.

Thanks

Hiren R. Thumar

[HirenThumar2702]

Hi Peter,

Good day,

Can I implement the same type of code isolation as on the dual-core controller?

If you have any specific STM32 series(on Dual core) that provides code isolation as per our requirements, please let us know.

Thanks

Hiren R. Thumar

[Bhuvi-Naveen]

Hello Hiren,

We are working on similar concepts. As per your post, you requested for differentiating Critical and Non critical module. But the response for this post describes about using Secured and Non-secured memory regions.

Did you use Secured memory for Safety critical module and Non Secured memory for Non critical module?

Were you able to certify the product with above configuration? Please advice.

Regards.

[Bhuvi-Naveen]

Hello Peter,

We are working on similar concepts. As per the post, the request was for differentiating Critical and Non critical module. But the response for this post describes about using Secured and Non-secured memory regions.

Are you suggesting to use Secured memory for Safety critical module and Non Secured memory for Non critical module? Please advice.

Regards.