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ADC Buffer Size and DMA

Carl_G
Senior

I've been diving in various rabbit holes and I've come to the issue of alignment and pointers. Thus, I enabled -Wcast-align. It has flagged the HAL for the ADC DMA startup here

 

static uint16_t adc_buffer[ADC_BUF_SIZE];
HAL_ADC_Start_DMA(hadc, reinterpret_cast<uint32_t*>(adc_buffer), 6);

This is due to the fact that my buffer is a 1/2 word array but this DMA function accepts only a word array. Yet, I've told the DMA that I am using 1/2 words so it knows how to perform the access. And I think this type of cast will be OK even for alignment issues since 16 bit access will always be aligned on 16 bit or 32 bit buffers.

So is this a case of knowing that it should be fine and disabling the warning here?

1 ACCEPTED SOLUTION

Accepted Solutions

> DMA start addresses require 32-bit word alignment, regardless of transfer size.

They only require 32-bit word alignment if the accesses are 32-bits. If 16-bits, only 16-bit alignment is required. And the peripheral does this automatically whether you like it or not:

TDK_0-1739972637148.png

 

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View solution in original post

3 REPLIES 3
TDK
Guru

Yes casting to (uint32_t*) is correct here. It won't cause issues. It will be aligned since the array is composed of half-words.

The warning is because the new cast may technically not be word-aligned, but that's fine as it isn't used for word accesses.

If you feel a post has answered your question, please click "Accept as Solution".
Ozone
Lead III

I would recommend the reference manual here, and I think almost all STM32 MCUs share this properties.

DMA start addresses require 32-bit word alignment, regardless of transfer size.
And the buffer size depends on the size and number of items to transfer.
Most ADCs can do 8 bis or less, which would only require 1 byte per item.

> So is this a case of knowing that it should be fine and disabling the warning here?

I would say, yes.

> DMA start addresses require 32-bit word alignment, regardless of transfer size.

They only require 32-bit word alignment if the accesses are 32-bits. If 16-bits, only 16-bit alignment is required. And the peripheral does this automatically whether you like it or not:

TDK_0-1739972637148.png

 

If you feel a post has answered your question, please click "Accept as Solution".