STM32L4P5-DK with Quad SPI RAM, do I have to remove the Octo SPI RAM

[mluerkens]

The board can be populated with a Quad SPI PSRAM, sharing OCTOSPI1. Do I need to remove the OctoSPI before using the Quad SPI or is it enough to disconned CS?

[Alex - APMemory]

Hi Matthias,

Good to hear that you manage your test and project

Regarding the CS bit,

-Case1: no use cross boundary page (RBX)  => Set to 0

-Case2: use cross boundary page                  => Set to 9

for corresponding boundary size of APS1604M-3SQR.

Alex

PS: We have 2 options RBX/non RBX for our QSPI SDR. RBX PN contains "SQR" and Non RBX device contains "SQ" without "R".

[mluerkens]

Hi Alex, now I got the APS1604M-3SQR populated as U14 on the STM32L4P5-DK. But not with the desired results. Just with setting clock divider very slow I'm able to read the ID (0d 5d 1b 58 31 31 46 3a) which seems to be correct. I clock diver is below 35, I can't even read the ID. The memory test you provided already generates a couple of errors. U12 is still connected but without R68 for OCTOSPIM_P1_NCS. All settings besides the clock divider are according to AN5050. Soldering is double and triple checked and looks fine. Of course 0402 by hand is tough, but this was done by a very skilled HW engineer. Is there anything I can check.

[mluerkens]

HI Alex, I got the APS1604M-3SQR soldered on the STM32L4P5-DK but I'm not having good results. Soldering has been done by a very skilled HW engineer, but manually populating 0402 is pretty tough. I just can read the ID on clock dividers being larger than around 35 and I'm having a lot of errors on running the memory test. It does not seem to be better than my setup with flying leads. I don't know, what to check. I did everything according to AN5050 and I'm using the provided source code. Do you have any idea?

[Alex - APMemory]

Hi Matthias,

What we usualy do in our lab would be to check the hardware environment.

1. Connecting the PSRAM of the SOP8 to the logic analyzer.
2. Then confirm whether the input command and the command output by PSRAM satisfy the datasheet.

Not sure if you have a chance to check this?

Alex

[mluerkens]

Hi Alex,
I’m having a SALEAE logic pro 8. That should be sufficient. But it needs some time to make the setup. I think ideally I directly put some short wires on the SO8 to connect the logic analyzer.
Analog input of the saleae is limited to 50 MHz so I can’t measure signal integrity.
I keep you updated.
Matthias

[mluerkens]

On looking how to connect the logic analyzer, we found two of the 33Ohms didn't have valid connection. Now it works, great. I coud verify correct initialization of the QSPI for the PSRAM already before the final board will arrive and will continue with some memory performance tests. As written in the documentation, SW needs a wise architecture to be performant on the PSRAM. A memcpy inside of the PSRAM is really slooooooooow. Seems the STM memcpy is just a stupid *a++ = *b++ ;

Thanks for your help and patience

Matthias

[Alex - APMemory]

Good to hear, you made it works.

Alex

[mluerkens]

Yep, really happy 😀

with an unoptimized memset on the memory mapped APS1604, I need 154ms to fill the complete 2 MByte, which is around 13,6 MByte/s. That sounds reasonable.