Hi everyone,
I'm designing a board with an STM32H7[STM32H757XI] and two MT48LC16M8A2P SDRAM chips to get 16MB (16-bit wide). I'd appreciate a schematic review before PCB fabrication.
Hardware:
- MCU: STM32H757XI
- SDRAM: 2x Micron MT48LC16M8A2P (4Mx8, 4 banks)
- Target speed: 100-110MHz
Key Connections:
- Data: Chip1 DQ[0:7] → FMC_D[0:7], Chip2 DQ[0:7] → FMC_D[8:15]
- Address: A[0:11] from FMC to both chips in parallel
- Control: CAS/RAS/WE/CKE/CS shared, separate DQM signals [DQM0 & DQM1]
- Chip select: Both using same FMC_SDNE0
Specific concerns:
1. Have I connected the DQM pins correctly for byte access?
2. Is my clock termination appropriate or do i need a separate termination resistors for each SDRAM?
3. Do I need to add series resistors on any lines?
Schematic image attached.
Thanks in advance for any feedback!
