2024-11-12 01:19 AM
Hello everyone,
I’m using the X-NUCLEO-NFC08A1 expansion board, which integrates the ST25R3916B chip, to set up an NFC Tag-Reader system. Before moving forward with this implementation, I want to test the reader's full functionality. So far, I’ve been able to read and write to registers and send direct commands via SPI. I verified these operations using an oscilloscope to monitor the MISO, MOSI, and CS/NSS lines, ensuring they work correctly.
The next step involves loading data into the FIFO to proceed with using the chip as a Reader. However, I’ve run into an issue: data is not being loaded into the FIFO as expected.
To load data into the FIFO, I am following the SPI protocol as specified in section 4.3.3 of the chip's datasheet. I send the frame 1000 0000 (0x80), followed by a data frame that varies from 1 to 512 bytes. Unfortunately, this doesn't seem to work, as no data appears in the FIFO.
Similarly, when attempting to read from the FIFO using the frame 1001 1111 (0xAF), I also receive no data. I can confirm this issue because, after both write and read attempts, the FIFO Status Register 1 and FIFO Status Register 2 remain empty (0x00), indicating no successful write or read.
Without resolving this, I'm unable to proceed with using the chip as a Reader, so I’m completely stuck. Could anyone assist me?
For additional context:
Could someone provide suggestions on how to solve this issue? Is there a register or setting I might be overlooking to enable FIFO access? What could I be doing wrong?
Thank you in advance for your help!
Solved! Go to Solution.
2024-12-09 05:36 AM
Hi Ulysses!
The problem has been resolved. Checking the MISO, MOSI and CD lines again with the oscilloscope I realized that the CS was not working correctly. In fact, I noticed that in the microcontroller I use (STM32U575), the pins of the CN5 are not mapped as in the STM32F4xxx. Therefore, changing the CS pin number i resolved the problem.
Thanks anyway for the information that you gave me!!!
2024-11-12 02:39 AM - edited 2024-11-12 03:58 AM
Hi Stefano,
it should work more or less as you describe. I think for FIFO access requires oscillator operational. Please set this bit and also verify the oscillator to be running (bits osc_ok and/or I_osc interrupt).
Looking at above I find a small error in your command for reading FIFO: "1001 1111 (0xAF)" which really should be "1001 1111 (0x9F)".
In case of further problems please provide logic analyzer traces of your sequences - including enabling the oscillator.
BR, Ulysses
2024-11-12 02:50 AM
Hi Ulysses!
About the error for the FIFO reading it's just a small confusing mistake made while writing the message but i've used 0x9F in the code.
In any case i will try to follow the procedure again as is written in the datasheet and monitor the signals better in the laboratory...
2024-12-09 05:36 AM
Hi Ulysses!
The problem has been resolved. Checking the MISO, MOSI and CD lines again with the oscilloscope I realized that the CS was not working correctly. In fact, I noticed that in the microcontroller I use (STM32U575), the pins of the CN5 are not mapped as in the STM32F4xxx. Therefore, changing the CS pin number i resolved the problem.
Thanks anyway for the information that you gave me!!!