L9961 - not using VREG advice

[KrauseRobotics]

Hi all,

I am looking at using the L9961 (https://www.st.com/en/power-management/l9961.html) for a project and after looking at the datasheet, I see it has it's own LDO.

The LDO can supply up to 35mA (pg. 13 of the data sheet). My design will use a STM32F103C6, which can use up to 150mA, plus I will have additional peripherals that will consume more.

My plan is to use a standard TPS692910-Q1 from TI to provide power for my 3v3 rail, as it can supply up to 1A of current which is plenty.

My question is, how do I handle not using the internal LDO on the L9961? It seems like the datasheet has all the IO referenced to the VREG coming from the LDO, and of course, I will have my own. 

Thanks,

Chad

[KrauseRobotics]

I should note that I am a bit of a rookie when it comes to PCB and electrical design - I am software engineer by trade, so apologies if my question seems stupid or simple

[PCOLE.1]

Hi,

if the VREG is not used, its capacitor shall be left mounted and you may add 10Mohm resistor as load.

Ciao,

Piero