Hi,
is there a possibility to use STGAP2DMTR with the bootstrap gate drive technique? There is no information in the datasheet about it, but there is a layout recommendation where a bootstrap diode and resistor are used. Thank you for your answer
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‎2023-01-02 2:27 AM
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‎2023-01-02 5:19 AM
Welcome, @Killthar​, to the community!
Of course, you can also use the bootstrap technique for the high side driver. An example for the realisation can be found in the tool EVALSTGAP2DM, where Rboot and Dboot mentioned in the data sheet correspond to the components D3 and R3. In EVALSTGAP2DM, however, R3 is not yet equipped in order to have all the possibilities of supplying the high side driver.
Does it answer your question?
Regards
/Peter
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‎2023-01-02 5:19 AM
Welcome, @Killthar​, to the community!
Of course, you can also use the bootstrap technique for the high side driver. An example for the realisation can be found in the tool EVALSTGAP2DM, where Rboot and Dboot mentioned in the data sheet correspond to the components D3 and R3. In EVALSTGAP2DM, however, R3 is not yet equipped in order to have all the possibilities of supplying the high side driver.
Does it answer your question?
Regards
/Peter
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‎2023-01-02 5:35 AM
Thank you for your answer. I am glad I can use bootstrap in my application. There is still a little bit confusion in my mind about UVLO function. After initial power up there is no sufficient VDD on pin VH_A (it must be switch on low side transistor to charge up the Cboot) so I assumed that due UVLO function (channel A) is not possible to use bootstrap driving technique.
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‎2023-01-02 5:49 AM
Not quite: after switching on, the low side switch must of course be switched on first, whereby UVLO indeed strikes once for the high side driver.
However, the low side channel switches off at some point, which supplies the high side channel via the bootstrap capacitor that has been loaded in the meantime and immediately cancels UVLO (see data sheet, section 5.1).
Regards
/Peter
