2019-05-21 11:05 PM
This is my code to write CFG1 register and read from same register and i have followed the steps given in data sheet for SPI communication , not using CRC for now and implementing for only one gate driver .
#include "driverlib.h"
#include "device.h"
#define WRITE_COMMAND 0X80
#define READ_COMMAND 0xA0
#define CFG1_REG_ADDR 0x0C
#define StartConfiguration 0x2A
#define StopConfiguration 0x3A
#define CFG1Value 0x00
#define CRC 0x00
#define RESET_COMMAND 0xD0
typedef char uint8_t;
// Function Prototypes
//
void initSPIA(void);
void SPIA_Gpio_Config( void );
void SPI_GateDriver_Config(void);
void SPI_GateDriver_Write_Reg( uint8_t, uint8_t);
void Write_SPI_Data( uint16_t);
uint16_t Read_SPI_Data( uint16_t);
uint16_t read_data=0;
//
// Main
//
void main(void)
{
// Initialize device clock and peripherals
//
Device_init();
//
// Disable pin locks and enable internal pullups.
//
Device_initGPIO();
//
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
//
Interrupt_initModule();
//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
//
Interrupt_initVectorTable();
//
// Set up SPI, initializing it for FIFO mode
//
initSPIA();
//
// Enable Global Interrupt (INTM) and realtime interrupt (DBGM)
//
EINT;
ERTM;
//
// Loop forever. Suspend or place breakpoints to observe the buffers.
//
while(1)
{
SPI_GateDriver_Config();
read_data = Read_SPI_Data( CFG1_REG_ADDR );
}
}
//
// Function to configure SPI A in FIFO mode.
//
void initSPIA()
{
//
// Must put SPI into reset before configuring it
//
SPI_disableModule(SPIA_BASE);
SPIA_Gpio_Config();
SPI_disableLoopback(SPIA_BASE);
//
// SPI configuration. Use a 1MHz SPICLK and 16-bit word size.
//
SPI_setConfig(SPIA_BASE, DEVICE_LSPCLK_FREQ, SPI_PROT_POL0PHA1,
SPI_MODE_MASTER, 1000000, 16);
GPIO_setDirectionMode(19,GPIO_DIR_MODE_OUT);
//SPI_setBaudRate(SPIA_BASE,DEVICE_LSPCLK_FREQ,115200);
SPI_setEmulationMode(SPIA_BASE, SPI_EMULATION_STOP_AFTER_TRANSMIT);
//
// Configuration complete. Enable the module.
//
SPI_enableModule(SPIA_BASE);
}
void SPIA_Gpio_Config( void )
{
//GPIO17 is the SPISOMIA.
GPIO_setMasterCore( 17, GPIO_CORE_CPU1 );
GPIO_setPinConfig( GPIO_17_SPISOMIA );
GPIO_setPadConfig( 17, GPIO_PIN_TYPE_PULLUP );
GPIO_setQualificationMode( 17, GPIO_QUAL_ASYNC );
//GPIO16 is the SPISIMOA.
GPIO_setMasterCore( 16, GPIO_CORE_CPU1 );
GPIO_setPinConfig( GPIO_16_SPISIMOA );
GPIO_setPadConfig( 16, GPIO_PIN_TYPE_PULLUP );
GPIO_setQualificationMode( 16, GPIO_QUAL_ASYNC );
//GPIO18 is the SPICLKA.
GPIO_setMasterCore( 18, GPIO_CORE_CPU1 );
GPIO_setPinConfig(GPIO_18_SPICLKA );
GPIO_setPadConfig( 18, GPIO_PIN_TYPE_PULLUP );
GPIO_setQualificationMode( 18, GPIO_QUAL_ASYNC );
//GPIO19 is the CS(active low).
GPIO_setMasterCore(19, GPIO_CORE_CPU1 );
GPIO_setPinConfig( GPIO_20_GPIO20 );
GPIO_setPadConfig(19, GPIO_PIN_TYPE_PULLUP );
GPIO_setQualificationMode(19, GPIO_QUAL_ASYNC );
GPIO_setMasterCore( 20, GPIO_CORE_CPU1 );
GPIO_setPinConfig( GPIO_20_GPIO20 );
GPIO_setPadConfig( 20,GPIO_PIN_TYPE_STD );
GPIO_setQualificationMode( 20, GPIO_QUAL_ASYNC );
GPIO_setDirectionMode(20,GPIO_DIR_MODE_OUT);
}
void SPI_GateDriver_Config()
{
GPIO_writePin( GATE_DRIVER_SHTDN_GPIO, 0 );//pull gate driver Shutdown pin to low
Write_SPI_Data( RESET_COMMAND);
Write_SPI_Data(StartConfiguration);
SPI_GateDriver_Write_Reg( CFG1_REG_ADDR,CFG1Value);
Write_SPI_Data(StopConfiguration);
}
void SPI_GateDriver_Write_Reg( uint8_t reg_address, uint8_t data )
{
uint16_t spi_data = 0;
spi_data = ( WRITE_COMMAND | reg_address );
Write_SPI_Data( spi_data );
Write_SPI_Data( data );
}
void Write_SPI_Data( uint16_t command )
{
uint16_t i = 0;
GPIO_writePin( GATEDRIVE_CS_GPIO, 0 ); //assert chip select low
SPI_writeDataNonBlocking(SPIA_BASE, command );
GPIO_writePin( GATEDRIVE_CS_GPIO, 1 ); //assert chip select high
GPIO_writePin( GATEDRIVE_CS_GPIO, 0 ); //assert chip select low
SPI_writeDataNonBlocking(SPIA_BASE, CRC );
GPIO_writePin( GATEDRIVE_CS_GPIO, 1 ); //assert chip select high
DEVICE_DELAY_US(3000);
}
uint16_t Read_SPI_Data( uint16_t reg_addr )
{
uint16_t i = 0;
uint16_t ret_val = 0;
uint8_t data = 0;
data = ( reg_addr | READ_COMMAND );
Write_SPI_Data( data );
Write_SPI_Data(0x00);
ret_val = SPI_readDataNonBlocking( SPIA_BASE );
return ( ret_val );
}
Please tell if i am missing anything.
Thank you
2019-05-22 05:38 AM
Quick look, code looks ok, Have you scoped the clock, si, so lines?
My design has a number of the stgap1as drivers daisychained *** i have been able to read the expected default values from the cfg and status registers, but have not been able to write any other values..
ultimately i am using a SAME70Q21 to configure and drive the pwm's but i started with a simple arduino uno for the SPI channel checkout.
Sorry i can't be more helpful..
2019-05-22 12:14 PM
After re-reading this, i think there may be an issue with the way you are using the ss pin. the datasheet says that the driver will ignore spi data that is not written in multiples of 16 bits.. maybe try writing the command and then the crc followed by a rising edge on ss? just a thought
2019-05-22 10:22 PM
void Write_SPI_Data( uint16_t command )
{
GPIO_writePin( 19, 0 ); //assert chip select low
SPI_writeDataNonBlocking(SPIA_BASE, command );
SPI_writeDataNonBlocking(SPIA_BASE, CRC );
GPIO_writePin( 19, 1 ); //assert chip select high
DEVICE_DELAY_US(3000);
}
You mean like this ?