2020-03-09 09:10 AM
Hi - does someone know whether the two LDOs on the SPV1050 will supply power even when the charging circuitry is disconnected with only battery connected?
My application should get LDO power all the time, but it only receives IN_LV recharge voltage some of the time. Is that supported?
Kind regards -
2020-08-27 12:44 AM
The LDO get their input voltage from the STORE rail, which is not supplied with power when there is no voltage at IN_LV. Therefore, LDO1 and LDO2 are only active when their release pin is activated and input power is available to the booster.
Good luck!
/Peter
2021-08-21 05:45 PM
Hi Peter,
I agree that the LDOs get their power from the STORE rail...but BATT and STORE should remain connected even if there is no voltage at IN_LV under the condition that VULP < STORE < VEOC. Therefore, as long as the battery is charged, the LDOs should remain powered even if IN_LV goes away...otherwise what good would the LDOs be? They would be on extremely intermittently and their maximum load would be equal to the energy harvesting source minus losses.
Furthermore, in the STEVAL-GPT001V1 watch shaped development kit, the 3.3V LDO is used to power the sensor tile module (STM32 w/sensors) and the system can transmit and sample even when the solar panel is not irradiated. The solar is only used to extend operating time during use, or recharge over time when the system is shut down.
I've also simulated the SPV1050 in PSPICE with a transient on the energy harvesting input (goes to zero for over a second) and the LDOs remain powered as long as the BATT/STORE transistor is closed (BATT_CONN is low).
Please let me know if I'm incorrect. This is kind of a deal breaker if the LDOs shut off when the energy harvesting source goes away.
2021-08-23 12:22 AM
I'm sorry for the confusion, a previous sentence was incorrect:
Therefore, LDO1 and LDO2 are only active when their release pin is activated and input power is available to the booster at the STORE pin.
So I fully agree and this is also described in the datasheet (under fig. 3):
On the contrary, in order to avoid the overdischarge of the battery, the pass transistor will be opened once the voltage on the STORE pin will decrease down to UVP threshold VUVP.
This means that it is closed and thus also supplies the LDOs as long as the voltage on the pin STORE is above VUVP.
Regards
/Peter
2021-08-23 03:37 PM
Thanks Peter! That makes perfect sense. So as long as the battery voltage is above the UVP threshold the LDOs will regulate 1.8V/3.3V (EN = 1), regardless of the energy harvesting source being available.
One concern of mine is tripping the VULP threshold during a load transient due to the voltage drop across the pass transistor (Rds_on = 6-8 ohms). If the voltage drop is large enough STORE will decrease below VULP and the pass transistor will open (even though the actual battery voltage is above VULP) correct?
To combat this scenario I imagine I could reduce the VULP threshold or use an external pass transistor that has a lower Rds_on?
2021-08-23 11:44 PM
Well, the load is usually buffered by the tank capacitor. Either you dimension it a little larger, or reduce the response sensitivity with a small capacitor on the UVP pin (e.g. 10...100nF, depending on the size of the resistance between STORE and UPV).
Because of the great effort involved, there is no point in using an external pass transistor.
Regards
/Peter