uPSD 3254

[dshah08]

Posted on December 02, 2004 at 09:58

uPSD 3254

[jdaniel]

Posted on May 17, 2011 at 12:03

Dilip,

I'm not entirely sure I understand this last question. You have 16 pages defined because you're using 4 bits of the page register. You are mapping main flash from 8000 - 0xFFFF on the first 8 pages in code space. On any of those 8 pages, by setting the appropriate bits in the VM register, you can allow access to DATA memory to go to the main flash as well. I guess what you're asking is can you use another 2 pages to just map the external SRAM in? The answer is yes. On those two pages, you could just NOT map the main flash from 8000 - FFFF and instead your SRAM will be accessed regardless of the VM register's contents.

[dshah08]

Posted on May 17, 2011 at 12:03

Thank you phaze426. I thoughjt about decoding 4 bits of page register to create 16 pages (8 for external flash(256K) and 2 for external FPGA sram(64K). This won't work if I want to run from primary flash in code space and then use fpga sram in data space to read/write since I could only select 1 of 16 pages at a time.

It would work if I use lower 3 bits of page register to create 8 pages of Primary flash and use 2 upper page register bits to select the FPGA sram.This way I can run from Primary flash and use FPGA sram in data space for read/write. Does this sound right ?

[jdaniel]

Posted on May 17, 2011 at 12:03

Dilip,

Yes... I'd say that's the best way to do it. It's a little tough to program in PSDSoft express, however, because you'll have to throw in pgrX signals into the chip select equations for your SRAM. Other than that, though, you shouldn't be thrown any curveballs.