2007-06-17 02:29 PM
Interrupt Problem when relocating code under ucosII
2007-03-15 10:19 PM
hello,
I am looking for the solution for a long time, but I can find the resolution. I am experiencing a problem of non-functioning interrupts when I execute code from location 0x20000000 in on-chip flash of ST750 by IAR. Now I have a boot loader located at 0x0000 and interrupts function fine within that. After reset, the boot loader will be executed then jump to the application at 0x20002000. However, the application (0x20002000) seems to run fine but interrupts are never executed under UCosII. It should be remapped, but I have no idea how to do. Can anyone give me a hint how to rewrite it or give me the new str750_cstartup.s79 file?? Thanks for your help!! Sincerely, Poshiun [ This message was edited by: poshiun on 16-03-2007 10:59 ]2007-03-19 02:57 PM
Dear Zouh,
Thanks for your help and reply. Because the example you gave is the environment with non-ucosii, I try to combine both of them. I add the init_tab.s file in the project, copy lnkarm_flash.xcl file from your example to my sample project and copy all the Remap_SRAM section from 75x_init.s to str750_cstartup.s79 file. However, it works as before(works well at 0x20000000, works crash at 0x20002000). I don't know what's wrong with it. The attached example is the pure environment with ucosii. Thanks for your help!! I appreciate it!! Sincerely, Poshiun ________________ Attachments : ST750_-Software_only_ucos.zip : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HtIp&d=%2Fa%2F0X0000000aLJ%2Fq.WawZ0YW8uuS.AsflAYW3xM1fTK8n1HjpEwjg8cMQs&asPdf=false2007-03-19 03:59 PM
Hello,
Now, I found another way to do interrupt under ucosii. I add the codes below in str750_cstartup.s79 file. #define Remap_SRAM ; remap SRAM at address 0x00 ; CFG Register CFG_GLCONF_Addr EQU 0x60000010 ; Global Configuration register base address SRAM_mask EQU 0x0002 ; to remap RAM at 0x0 #ifdef Remap_SRAM MOV r0, #SRAM_mask LDR r1, =CFG_GLCONF_Addr LDR r2, [r1] ; Read GLCONF Register BIC r2, r2, #0x03 ; Reset the SW_BOOT bits ORR r2, r2, r0 ; Change the SW_BOOT bits STR r2, [r1] ; Write GLCONF Register #endif ldr r3,=0x40 ldr r0,=0x20002000 ldr r1,=0x40000000 loop ldr r2,[r0] str r2,[r1] add r0,r0,#4 add r1,r1,#4 subs r3,r3,#4 bne loop //correct the data in str750_flash.xcl // Code memory in flash -DROMSTART=0x20002000 -DROMEND=0x2003FFFF -DVECSTART=ROMSTART // Data memory -DRAMSTART=0x40000040 -DRAMEND=0x40003FFF It will work well.2007-06-17 02:29 PM