Posted on May 17, 2011 at 09:36According to the ref.man page 170:
DMA_EN: DMA enable bit
Read/Clear bit: a write with ‘1’ reset to ‘0’ the bit value, while a write with ‘0’ has no effect.
In the 91x_enet.c :
void ENET_Start ( void)
{ u32 value;
/* Force a ENET abort by software for the receive block */
ENET_DMA->RXSTR &=~ DMA_RX_START_DMA_EN;
.....
This, if I'm right clears bit DMA_EN, with no effect ???
Later on page 170:
Notes:
– A DMA_EN 0->1 transition resets the FIFO content and the RX interrupts
(ENET_ISR[15:0]).
– A DMA_EN 1->0 transition forces the DMA to immediately close the transfers
toward the AHB bus and MAC core.
I'm confused!
regards,
Andras
