Hello,
I found a problem in eDesignSuite when i try to use STNRGPF01 (PFC boost interleaved IC).
At input current sensing the ICS Target Voltage is 3.00V and in the datasheet the ICS Target Vltage looks like it is 1.25V (also in the Help section of eDesignSuite). Which one is correct?
Also, is there any other datasheet (maybe we need to sign an NDA for it or smth like that) because the one on the site is very poor.
Best regards,
Mihai I.
Hello again @Carmelo VICCICA ,
I got another question about your STEVAL board.
Here you can see that the output of U304 - an output of 5V is going directly into the IC (OCP[1] - which is a 1.25V maximum allowed) how that the chip still works?
Another question is about the ZVD signal and circuit, because it looks very strange and even in simulation i don't understand how it does work. I guess that it should give a pulse on the ZVD pin every time the signal is 0 (given that is rectified by that diode D102). But why those two resistance (R108 and R109)?
Thanks a bunch and best regards,
Mihai
Hi Mr. Iliescu
about your questions, below you can find some clarification how system works.
Q: "Here you can see that the output of U304 - an output of 5V is going directly into the IC (OCP[1] - which is a 1.25V maximum allowed) how that the chip still works?"
R: In case of consecutive OCP events, C333 is charged until the FAULT voltage level (1.23 V) is reached on OCP[1] PIN 28 of the STNRGPF01. At this point the system is stopped so the voltage cannot increase above 1.23 V, but in any case the pin is 5V tolerant so no problem.
Q: Another question is about the ZVD signal and circuit, because it looks very strange and even in simulation i don't understand how it does work. I guess that it should give a pulse on the ZVD pin every time the signal is 0 (given that is rectified by that diode D102). But why those two resistance (R108 and R109)?
R: Resistors R105, R108 and R109 limit the sensing current at few mA while R106 sets the voltage for a correct conduction of the optocoupler’s diode.
During the positive half-cycle, diode D102 is directly polarized and optocoupler is turned on, so the capacitor C101 is charged and ZVD voltage is clamped to VDD-VCEsat. During the negative half-cycle optocoupler is open, hence capacitor is discarged through R110 and ZVD voltage is equal to GND.
Best Regards.
Carmelo Viccica
