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Timing rules in EMI

77shell
Associate
Posted on August 13, 2007 at 04:35

Timing rules in EMI

1 REPLY 1
77shell
Associate
Posted on May 17, 2011 at 11:31

Hi everyone,

I'm confused about Timing rules that is described in page 40 of UM0388.

The No.4 rule is described as below,

''The number of Write Enable wait states must be greater than the Address Latch Address Enable time in mux mode (WSTOEN > ALE).''

In the previous section said,

WSTOEN: Read Enable

Is there some mistake in UM0388?