2007-03-15 06:15 AM
2007-03-12 03:33 AM
Hi all,
I'm currently using the timer system to receive a pulse (approx. 4KHz) which will arrive on the Input Capture A Reg on Timer 1. I'm using a Hitex Evaluation Board for the job. I am currently setting up the ICAPA pin to receive the pulse. I the the pulse to trigger the counter which I will then read into a variable within my code. I basically just want to keep track of the number of pulses that arrive so input capture functionality is not neccessary. I have configured it as an alternate function push pull as the STR7 Manual suggests. I then clear the Status Reg, clear the Control Reg2 (CR2), reset the CR1 reg to 0 and then set bit 0(Ext clk) and bit 1 (rising edge triggers counter). Lastly, I enable the timer (bit 15 of CR1). My current problem is that the counter is not getting triggered and is remaining at its reset value of 0xfffc. I have also tried the same config for Timers 2&3 with no result. Any suggestions? See code below: // set up for a Alternate function Config on P1.4 IOPORT1_PC0 |= ( 1 << 4 ); IOPORT1_PC1 |= ( 1 << 4 ); IOPORT1_PC2 |= ( 1 << 4 ); TIM1_SR = 0;//RESET TIM1_CR2 = 0;//RESET TIM1_CR1 = 0x0000;//RESET_TO_ZERO; TIM1_CR1 |= ( 1 << 0 ) | ( 1 << 1 ); TIM1_CR1 |= ( 1 << TIMER_ENABLE );2007-03-13 02:16 AM
Hello,
To use the Timer input capture mode, you need to configure the input capture pin as ''Input Tristate TTL'' instead of ''AF PP''. You need also to select the edge of the active transition on the ICAPA ''rising or falling edge''. You can also use the STR71x software library which offers some timer examples that could help.2007-03-15 06:15 AM
Thanks for the reply,
I reconfigured the IO ports for the timer as 'Input Tristate TTL'. I did not need to configure input capture (ICAPA) since it was only the raw counter value that I wanted. I had previously been applying a 3.3V trigger pulse train which didn't help either so I switched this to a steady state 5V for TTL. During my testing, I had been leaving the timer pins floating and using a 'wire touching technique' to bring the timer input high and low. This led to spurious results in the counter register since the state of the pins were undetermiable. When I changed this to a proper switch configuration, switching from +5V to ground the counters stabalised. Thanks again for the help! ;)