STPC Elite with SDRAM 512Kx32x4 (Winbond W986432DH)

moedeker2 · ‎2003-06-10

Posted on June 10, 2003 at 17:29

moedeker2 · ‎2003-05-19

Posted on May 19, 2003 at 14:34

In the forum are several Questions about this Dram configuration - but they were not answered.

So is there anyone who knows the settings of MEM_BANK0 to 3 and MEM_REG0-2 for these chips?

I have 2 chips connected:

STPC MA0-10 -> SDRAM MA0-10

STPC MA11/CS2# -> SDRAM MA11 (is for bigger SDRAM's)

STPC MA12/CS3#/BA1 -> SDRAM BA1

STPC BA0 -> SDRAM BA0

STPC CS0# -> SDRAM CS#

STPC MD0-31 -> SDRAM 0

STPC MD32-64 -> SDRAM 1

stephen239955_st · ‎2003-05-20

Posted on May 20, 2003 at 09:46

All the information you need is located in the programming manual or on the website.

In order to determine the values to be entered in registers MEM_BANK0 to 3, refer to the link below;

http://www.stmcu.com/files/mcu/regset.htm#memory

Look for; ''SDRAM controller (STPC Consumer-S, Elite, Consumer-II, Atlas, Vega)''

For the details on how to program MEM_REG0 go to the same link and look for;

''Timings'', it is just below.

The rest of the information MEM_REG1:2 can be taken from the part datasheet and programmed directly into the registers.

You need to determine the whether you have 8 or 16mA devices, are your parts 64 or 128Mbits.... and finally, determine the width of your devices to enter the value in MEM_REG2.

You may find the BIOS writers guide usefull as it contains wealth of reuseable code in assembler language.

Regards

moedeker2 · ‎2003-05-20

Posted on May 20, 2003 at 11:25

Sorry Stephen,

I think this is wrong! Because the programming guide, data sheet and regset.htm don't know anything about soldered 512Kx32x4 SDRAMs. I.e. the config bits 17,18 in MEM_REG0 handles DIMM's with 4Mx4(BL=1024, 2Mx8(BL=512) and 1Mx16(BL=256) but not these SDRAMs. The data sheet of the SDRAM does'nt specify the max. burst length. But I think when the SDRAM checks during CAS only MA0-7 so max. burst length should be 256!? Right?

Next thing which is left unclear: MEM_REG2 - what means banks in this line ''64 Mbits or 128Mbits 4 SDRAM banks''? internal banks?

Last but not least. I implement the whole code of SDRAM init and detecting. But this code could not detect the right amount of ram with these SDRAM's. May be there is something wrong with the wiring of the SDRAM pins MA0-11, BA0-1. So I attached the schematics.

Please help me

Bernd

________________

Attachments :

Elite_SDRAM.pdf : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006Htts&d=%2Fa%2F0X0000000aYX%2Fj_6UZvNOn9iy0qLrtc7qWSxCwNbO_crXTl7IWeIYL1A&asPdf=false

moedeker2 · ‎2003-05-21

Posted on May 21, 2003 at 16:43

Hi,

I found the bug. Bad soldering avoided MA6 to reach SDRAM!! MA6 reached the resistor array but not the SDRAM. Everything is fine.

It would be nice for newbies to add these SDRAMs to the programming guide.

Thanks

pitbag · ‎2003-06-10

Posted on June 10, 2003 at 14:16

I use the same device, could the demo BIOS support it?

I want get BIOS from PHOENIX. could I get the right BIOS?

I'm a hardware engineer, in my company, no software engieer can help me.

moedeker2 · ‎2003-06-10

Posted on June 10, 2003 at 17:29

I ported an AMI BIOS 07/15/95 with the detecting functions from bios writer guide 2.5a from this site.

I tried too the Elite Evalbios from this site which detected the right amount of SDRAM.

So it could be that Phoenix does the right thing, but I don't know.

Benno