ST72254 in I2C slave mode

marco32 · ‎2003-10-16

Posted on October 16, 2003 at 22:38

marco32 · ‎2003-09-10

Posted on September 10, 2003 at 11:17

Hello,

does anybody use the ST72254 or family, in the I2C slave mode?

I try to do it, but ''he'' don't listen to the commands!

I've written in register OAR1 the slave adress

Enabled the I2C interface by twice wrtiting the CR register

and so on. Just following the datasheets.

Anybody suggestions?

sjo · ‎2003-09-10

Posted on September 10, 2003 at 12:10

Have a look at an1713, its an appnote for a smbus slave but will still helps you on the use on the I2C peripheral in slave mode, as smbus is based loosely on I2C.

Regards

sjo

marco32 · ‎2003-09-10

Posted on September 10, 2003 at 12:45

Great to have Application manuals!!!!

I've found an application note about I2C Slave mode:

AN1042.

Thanks for the link to the application notes.

marco32 · ‎2003-09-11

Posted on September 11, 2003 at 10:27

HELP, i become crazy,

The ST7 doesn't listen to his own I2C adress.

I get only the Stop Detection interrupt flag.

Is the reception of the ST7 in I2C slave mode dependent with the I2C clock divider?

Has anybody work with the ST7 in I2C slave mode?

[ This message was edited by: Moppie on 11-09-2003 13:58 ]

itsmejatinus · ‎2003-09-11

Posted on September 11, 2003 at 14:01

In AN1042 code, GCAL_Add must be commented in the code if not used.OAR2_Add must be configured as per the Fcpu of the slave device. I2C clock divider (I2CCCR) need not be used in slave mode.

This code is already tested with I2C master and there were no problems.

marco32 · ‎2003-09-11

Posted on September 12, 2003 at 08:37

Thanks for help.

The problem was found in the hardware!!!

I use optocoupler to made an isolation.

Only the optocouplers was inverted the signals!

The software is now working.

marco32 · ‎2003-10-16

Posted on October 16, 2003 at 11:17

The ST7 read often wrong data from the I2C-bus in Slave mode.

I've read the Application note and copy the software.

Could it be a problem if the master hasn't a steady clock?

When i use a standard I2C device (PCF8574) the master sends correctly the data to it.

So what do i wrong that the slave doesn't work well?

peterharris9 · ‎2003-10-16

Posted on October 16, 2003 at 22:38

Hi Moppie

The clock speed in I2C is not critical. The slowest device on the bus can hold the clock low reducing the bit rate to the point where it can deal with it.

We are using I2C to allow several modules to communicate across a ribbon cable. With this setup the messages can get corrupted by noise. To deal with this we devised a message standard so each message looks like this:

destination address

source address

message length

contents

:

contents

checksum

The checksum is simply the result of adding all the bytes in the message together.

When a message is received, the length and checksum can be checked to make sure the message is valid. Bad messages are deleted, good messages are acknowledged. If the master does not receive an ACK within a given time, the message is resent.

Hope this helps

BM