2024-09-11 12:40 AM
as per data sheet
below is the timing details for read write operations for m95m04-dr:
can we operate or perform operations in 1microsecond or so? if yes what about write/read data integrity?
Regards,
Sumit
2024-09-11 03:05 AM
Welcome @astrosumit, to the community!
The M95M04-DR has an SPI interface with a maximum clock frequency of f = 10MHz.
A write access requires at least n = 40 clock cycles.
Let's do the maths: transferring a single byte therefore takes at least 1/f * n = 4µs. However, this does not take into account the time required by the internal state machine to actually write to the EEPROM cells. Typically, this time is significantly less than 5ms, but is heavily dependent on e.gg. the number of write cycles and the chip temperature. In order to ensure successful writing under all the environmental conditions specified in the data sheet, the maximum time specified there is therefore 5ms (BTW 10ms for the LID instruction).
For which application do you need such short write times on NVM memory?
Regards
/Peter