i2c on the Vega

[hpeacock]

Posted on March 17, 2005 at 10:24

i2c on the Vega

[hpeacock]

Posted on January 11, 2005 at 13:36

I am attempting to use the Vega's integrated I2C port without success.

I have tried using the supplied library (stpckit/src/libreg/i2cvega), but I get no response from the processor. I strongly doubt that I am actually accessing the Vega I2C registers properly - the register defaults have no resemblance to the register defaults shown in the programming manual. For instance, unsigned long reg; HWI2C_Init(); reg = HWI2C_ReadReg(HWI2C_REG_CLOCK); gives a value of 0xffffffff. I am using the evaluation board with a Vega marked STPCV1JEBC which I assume is mature enough to have a working I2C. Has anyone used the Vega's I2C?. If so, could you please supply a snippet of working example code? Thanks.

[granitvt]

Posted on January 12, 2005 at 02:20

I work with I2C on VEGA on low level (not OS) without prolem.

Best regards.

[hpeacock]

Posted on January 13, 2005 at 14:50

Hi, user:

Thanks for your response. I would just like to verify that you are not using the I2C emulator from the STPCKIT that uses GPIO to emulate I2C, but are in fact using the I2C integrated into the VEGA processor. If you are using the integrated I2C, would you be willing to show me a couple of snippets of your code, specifically the initialization and an example of reading from the I2C? I am also working at a low level (no OS). Thanks for any help you can give, Harold

[granitvt]

Posted on January 14, 2005 at 02:57

Hi

; BIOS configuring STPC HOST Register to base addres 5000h ;~~~~~~~~~~~~~~~~~~~~~~~~~ ; ~~~ MACROS ~~~~ wr_host_io_b macro rg, m, d mov dx,5000h mov al,rg out dx,al mov dx,5004h in al,dx mov bl,al ; �?² bl - �?¿Ñ€�?¾Ñ‡�?¸Ñ‚�?°�?½�?½Ñ‹�?µ �?´�?°�?½�?½Ñ‹�?µ and bl,not m mov al,d and al,m or al,bl out dx,al endm rd_host_io_b macro rg, rez ;push dx mov dx,5000h mov al,rg out dx,al mov dx,5004h in al,dx mov rez,al ; �?² rez - �?¿Ñ€�?¾Ñ‡�?¸Ñ‚�?°�?½�?½Ñ‹�?µ �?´�?°�?½�?½Ñ‹�?µ ;pop dx endm wr_host_io_dw macro rg, m, d mov dx,5000h mov al,rg out dx,al mov dx,5004h in eax,dx mov ebx,eax ; �?² ebx - �?¿Ñ€�?¾Ñ‡�?¸Ñ‚�?°�?½�?½Ñ‹�?µ �?´�?°�?½�?½Ñ‹�?µ and ebx,not m mov eax,d and eax,m or eax,ebx out dx,eax endm rd_host_io_dw macro rg, rez mov dx,5000h mov al,rg out dx,al mov dx,5004h in eax,dx mov rez,eax ; �?² rez - �?¿Ñ€�?¾Ñ‡�?¸Ñ‚�?°�?½�?½Ñ‹�?µ �?´�?°�?½�?½Ñ‹�?µ endm ;~~~~~~~~~~~~~~~~~~~~~~~~~ ; ~~~ END MACROS ~~~~ ; Programm for working I2C with At24C02 without interrupt OPTION SCOPED cseg segment para public 'code' assume cs:cseg,ds:cseg .486P begin: ;Init wr_host_io_dw 0Ch, 01FFFF0h, 0100FF0h ; Set FIFO -> maximum wr_host_io_dw 0Ch, 0Fh, 07h ; Soft reset & Flush FIFO wt: ; wait transmit & receive FIFO empty, I2C not busy rd_host_io_b 4h, bl mov al, bl and al,40h jz wt ; Write Data to AT24C02 for test wr_host_io_dw 0Ch, 0FF0h, 08F0h ; Set FIFO -> maximum ;wr_host_io_dw 08h, 07FFFF03h, 03h ; START & STOP transfer I2C wr_host_io_dw 18h, 0FFFFFFFFh, 0ah ; 8 BYTES transfer I2C to AT24C02 wr_host_io_b 0h, 0FFh, 0A0h ; Address + Write wr_host_io_b 0h, 0FFh, 0h ; word address wr_host_io_b 0h, 0FFh, 011h ; data0 wr_host_io_b 0h, 0FFh, 022h ; data1 wr_host_io_b 0h, 0FFh, 033h ; data2 wr_host_io_b 0h, 0FFh, 044h ; data3 wr_host_io_b 0h, 0FFh, 055h ; data4 wr_host_io_b 0h, 0FFh, 066h ; data5 wr_host_io_b 0h, 0FFh, 077h ; data6 wr_host_io_b 0h, 0FFh, 088h ; data7 wr_host_io_dw 08h, 07FFFF03h, 03h ; START & STOP transfer I2C wt1: ; wait transmit FIFO empty rd_host_io_b 4h, bl mov al,bl and al,10h jnz wt1 wt11: ; wait I2C busy rd_host_io_b 4h, bl mov al,bl and al,1h jnz wt11 mov ecx, 0FFFFFFh pause_wr: loopd pause_wr ;Read data from AT24C02 for test wr_host_io_dw 18h, 0FFFFFFFFh, 02h ; 2 BYTE write to I2C (address + word address for read) wr_host_io_b 0h, 0FFh, 0a0h ; Address + Write wr_host_io_b 0h, 0FFh, 0h ; Word address = 0 wr_host_io_dw 08h, 03h, 03h ; START & STOP rt211: ; wait transmit FIFO empty rd_host_io_b 4h, bl mov al,bl and al,010h jz rt211 rt111: ; wait I2C busy rd_host_io_b 4h, bl mov al,bl and al,1h jnz rt111 wr_host_io_b 0h, 0FFh, 0a1h ; Addrees + Read wr_host_io_dw 18h, 0FFFFFFFFh, 08h ; 8 BYTE read from I2C wr_host_io_dw 08h, 07FFFF03h, 04000003h; START & STOP transfer (read) I2C rtt: ; wait transmit FIFO empty rd_host_io_b 4h, bl mov al,bl and al,10h jz rtt rtr: ; wait Byte received in FIFO rd_host_io_dw 4h, ebx mov eax,ebx ror eax,16 and al,2h jz rtr rt11_: ; wait I2C busy rd_host_io_b 4h, bl mov al,bl and al,1h jnz rt11_ wr_host_io_dw 0Ch, 06h, 06h ; Flush FIFO wt_fr: ; wait transmit & receive FIFO empty rd_host_io_b 4h, bl mov al, bl and al,40h jz wt_fr mov cx,8 read_fifo1: rd_host_io_b 0h, bl ; 8 cycle read mov al, bl call snd_byte loop read_fifo1 ; After I send receive byte to COM-port or check ad_r dd 0 seg_ad dd 0 ss_n dw 0 sp_n dw 0 cseg ends end begin ;----------------------------- Best regards

[kaouther]

Posted on January 17, 2005 at 14:27

Yes we used veag's i2C and it works without problem. Are you using the last version of vega programming manual? I will try to send you an example code.

[hpeacock]

Posted on January 18, 2005 at 13:40

Thanks for your responses.

It has turned out that my problem is with the initialization, specifically setting up the base address for the Host interface that is used by the I2C. I was using the initialization provided by the STPCKIT SDK, which turns out to be incorrect. As per the programming manual (section 3.8), the least significant byte of the host base address must be ored with 0x03 when it is written to Host interface configuration address 0x12 - this is not done in the SDK (as of version 2.1). When I made this fix, I was able to access the I2C registers. I urge the SDK people to make this fix in future versions of the SDK. Harold

[anouar]

Posted on March 17, 2005 at 10:24

Hello,

You assume that in the STPCKIT V2.1 you have changed the HWI2C_BASE_LSB parmater to HWI2C_BASE_LSB ||0x03 when writing in the Host configuration register 0x12 ? We will check this point and return to you to confirm. Thanks.