2007-12-04 04:46 AM
2011-05-17 02:31 AM
Hi All
Can anyone explain the fast mode setting of the I2C controller in the STR91? The formula for setting the speed (CC[11..0] is in CCR and ECCR registers) is either PCLK/(2 x (CC[11..0] + 7)) - in slow mode up to 100kHz or PCLK/(3 x (CC[11..0] + 9)) - in fast mode up to 400kHz The fast mode formula is valid when the FM/SM is set in the CCR register. With PCLK = 48MHz this results in values of 0xe9 and 0x1f respectively. However, not setting the FM/SM bis in CCR allows the 400MHz speed also be obtained by setting the value 0x35. Question: Does the FM/SM bit change any other internal operation (eg. filter times ?) to make the interfce better adapted to teh fast mode of operation or can fast mode still be used without this bit, simply by respecting the standard speed formula? Regards Mark Butcher2011-05-17 02:31 AM
Here's an addition:
In the data sheet, I believe that there is an error with the calculation of CC. It is given as: CC[11..0] = ((PCLK/Tscl)-7)2 but I think that it should be CC[11..0] = (PCLK/(2xTscl)) - 7 I tested this at 100kHz and go the exact speed. The other was giving about 98.7kHz rather than 100kHz. Regards Mark